]> Joshua Wise's Git repositories - fpgaboy.git/blame - diag.asm
Add nintendo logo to diag. Add xmodem loader. Add auxboot and binwire utilities.
[fpgaboy.git] / diag.asm
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1 SECTION "a",HOME[$00]
2
3start: jp main
4
5 section "vbl",HOME[$40]
6 jp vbl
7
8 section "lcdc",HOME[$48]
9 jp lcdc
10
11 section "tmro",HOME[$50]
12 jp tmro
5bac4cf0 13
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14 SECTION "b",HOME[$100]
15boot: jr main ; $0100
16 nop ; $0102
17 nop ; $0103
18 ;Nintendo Logo ; $0104
19 DB $CE,$ED,$66,$66,$CC,$0D,$00,$0B,$03,$73,$00,$83,$00,$0C,$00,$0D
20 DB $00,$08,$11,$1F,$88,$89,$00,$0E,$DC,$CC,$6E,$E6,$DD,$DD,$D9,$99
21 DB $BB,$BB,$67,$63,$6E,$0E,$EC,$CC,$DD,$DC,$99,$9F,$BB,$B9,$33,$3E
22 ;$0134
23 DB $00,$E7,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
24 ;$0144
25 DB $00,$00,$00,$00,$00,$00,$00,$00, $00,$00,$00,$00,$00,$00,$00,$00
26
5bac4cf0 27main:
5bac4cf0 28 ld a, $FF
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29 ld c, $51
30 ld [c], a
00573fd5 31
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32 ld sp, $DFF0
33
30ef1ae0 34 ld a, $04 ;start timer, 4.096KHz
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35 ld c, $07
36 ld [c], a
03202f62 37
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38 ld hl, $DF81
39 xor a
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40 ld [hli], a
41 ld [hli], a
30ef1ae0 42
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43 ld hl, signon
44 call puts
39a68cde 45
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46 ld a, $91
47 ld [$FF40], a
48
39a68cde 49 call putscreen
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50
51 ei
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52
53 call memtest
54
55 call insntest
56
57 call waitsw
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58
59 di
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60
61 jr main
62
63signon:
64 db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
65
0dea04d3 66tiles:
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67 db %01111100
68 db %11000110
69 db %11000110
70 db %11111110
71 db %11000110
72 db %11000110
73 db %11000110
0dea04d3 74 db %00000000
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75
76 db %11111100
77 db %11000110
78 db %11000110
79 db %11111100
80 db %11000110
81 db %11000110
82 db %11111100
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83 db %00000000
84
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85 db %01111100
86 db %11000110
87 db %11000010
88 db %11000000
89 db %11000010
90 db %11000110
91 db %01111100
92 db %00000000
93
94 db %11111100
95 db %11000110
96 db %11000110
97 db %11000110
98 db %11000110
99 db %11000110
100 db %11111100
101 db %00000000
102
39a68cde 103putscreen:
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104 LD A,$fc ; $001d Setup BG palette
105 LD [$FF47],A ; $001f
106
4d90f272 107 ; Wait for vblank
80ecd2fe 108 call .vblwait
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109
110 ld hl, $8000 ; Copy two tiles.
0dea04d3 111 ld de, tiles
14778cde 112 ld c, $20
4fd47c85 113.cloop: ld a, [de]
0dea04d3 114 inc de
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115 ld [hli], a
116 ld [hli], a
0dea04d3 117 dec c
39a68cde 118 xor a
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119 cp c
120 jr nz, .cloop
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121
122 ld hl, $9800
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123.vloop: call .vblwait
124 ld c, $40
0dea04d3 125 ld b, 0
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126.loop: ld a, b
127 inc b
128 and $03
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129 ld [hli], a
130 ld a, h
131 cp $9C
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132 ret z
133 dec c
134 xor a
135 cp c
136 jr nz,.loop
137 jr .vloop
138
139.vblwait:
140.stat1: ld a, [$FF41] ; STAT
141 and $03
142 cp $00
143 jp nz, .stat1
144.stat2: ld a, [$FF41]
145 and $03
146 cp $01
147 jr nz, .stat2
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148 ret
149
00573fd5 150vbl:
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151 PUSH AF
152 PUSH BC
153 PUSH DE
154 PUSH HL
155
156 xor a
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157 ld [$FF0F], a
158
80ecd2fe 159 ld a, [$FF51]
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160 bit 7, a
161 jr z, .nothing
162
163 bit 0, a
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164 call nz, .scyup
165
ee31adcb 166 bit 1, a
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167 call nz, .scydown
168
ee31adcb 169 bit 2, a
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170 call nz, .scxup
171
ee31adcb 172 bit 3, a
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173 call nz, .scxdown
174
175.nothing:
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176 POP HL
177 POP DE
178 POP BC
179 POP AF
180
181 RETI
182
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183.scyup: ld hl, $FF42
184 inc [hl]
185 ret
186
187.scydown: ld hl, $FF42
188 dec [hl]
189 ret
190
191.scxup: ld hl, $FF43
192 inc [hl]
193 ret
194
195.scxdown: ld hl, $FF43
196 dec [hl]
197 ret
198
199
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200lcdc:
201 PUSH AF
fe3dc890 202 PUSH BC
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203
204 xor a
f6fa1d6e 205 ld [$FF0F], a
00573fd5 206
fe3dc890 207 POP BC
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208 POP AF
209
210 reti
211
212tmro:
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213 PUSH AF
214 PUSH BC
215 PUSH DE
216 PUSH HL
217
218 xor a
f6fa1d6e 219 ld [$FF0F], a
30ef1ae0 220
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221 ld c, $45 ; LYC
222 ld a, [c]
223 inc a
224 ld [c], a
225
f6fa1d6e 226 ld a, [$DF82]
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227 cp 0
228 jr z, .noprint
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229 ld a, $41 ; print A
230 call putc
7e4f4505 231.noprint:
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232 ld a, [$DF81]
233 inc a
234 ld [$DF81], a
235 ld [$FF51], a
30ef1ae0 236
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237 POP HL
238 POP DE
239 POP BC
240 POP AF
241 RETI
30ef1ae0 242
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243; Memory tester: writes h ^ l to all addresses from C000 to DF80.
244memtest:
245 ld hl,memteststr
246 call puts
247
f6fa1d6e 248 ld hl, $C000 ; Write loop
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249.wr:
250 ld a,h
251 xor l
252 ld [hli],a
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253 ld a, h
254 cp $DF
5bac4cf0 255 jr nz, .wr
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256 ld a, l
257 cp $80
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258 jr nz, .wr
259
f6fa1d6e 260 ld hl, $C000 ; Read loop
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261.rd:
262 ld a,h
263 xor l
264 ld b,a
265 ld a, [hli]
266 cp b
267 jr nz, .memfail
268
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269 ld a, h
270 cp $DF
5bac4cf0 271 jr nz, .rd
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272 ld a, l
273 cp $80
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274 jr nz, .rd
275
276 ld hl, testokstr ; Say we're OK
277 call puts
278 ret
279.memfail: ; Say we failed (sadface)
280 ; decrement hl the easy way
f6fa1d6e 281 dec [hl]
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282 push hl
283 ld hl, failatstr
284 call puts
285 pop hl
286 ld a, h
287 call puthex
288 ld a, l
289 call puthex
290 ld a, $0A
291 call putc
292 ld a, $0D
293 call putc
294 ret
295memteststr:
296 db "Testing memory from $C000 to $DF80...",0
297testokstr:
298 db " OK!",$0D,$0A,0
299failatstr:
300 db " Test failed at $",0
301
302puthex: ; Put two hex nibbles to the serial console.
303 push af
304 rra
305 rra
306 rra
307 rra
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308 and $0F
309 add $30
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310 call putc
311 pop af
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312 and $0F
313 add $30
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314 call putc
315 ret
316
317; Wait for switches to be flipped on and off again.
318waitsw:
319 ld hl,waitswstr
320 call puts
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321
322 ld hl,$DF82
323 ld a, 1
324 ld [hl], a
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325
326 ld c, $51
327 xor a
328 ld [c],a
329
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330.loop1:
331 ld a,[c]
f888201b 332 cp $0
5bac4cf0 333 jr z,.loop1
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334
335.loop2: ld a,[c]
f888201b 336 cp $0
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337 jr nz,.loop2
338 ret
339
340waitswstr:
341 db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
342
343; Core instruction basic acceptance tests.
344insntest:
345 ld hl, .insnteststr
346 call puts
347
348 ; Test PUSH and POP.
349 ld b, $12
350 ld c, $34
351 ld d, $56
352 ld e, $78
353 push bc
354 pop de
355 ld hl, .pushpopfail
356 ld a, d
357 cp b
358 jr nz,.fail
359 ld a, e
360 cp c
361 jr nz,.fail
362
363 ; Test ALU (HL).
364 ld hl, .ff
365 ld a, $FF
366 xor [hl]
367 ld hl, .xorhlfail
368 jr nz, .fail
369
370 ; Test JP (HL)
371 ld hl, .jphl
372 jp [hl]
373 ld hl, .jphlfail
374 jr .fail
375 rst $00
376.jphl:
377
378 ; Test JR
379 ld a, $FF
f888201b 380 cp $0
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381 jr nz,.jr
382 ld hl, .jrfail
383 jr .fail
384 rst $00
385.jr:
386
387 ; Test inc16
388 ld d, $12
389 ld e, $FF
390 ld hl, .inc16fail
391 inc de
392 ld a, $13
393 cp d
394 jr nz, .fail
395 ld a, $00
396 cp e
397 jr nz, .fail
398
399 ; Test CP.
400 ld hl, .cpfail
401 ld a, $10
f888201b 402 cp $20
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403 jr nc,.fail
404 ld a, $20
f888201b 405 cp $10
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406 jr c,.fail
407
408 ; Test CPL
409 ld hl, .cplfail
410 ld a, $55
5bac4cf0 411 cpl
f888201b 412 cp $AA
5bac4cf0 413 jr nz,.fail
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414
415 ; Test DI/EI delay
416 di
00573fd5 417 ld hl, .dinocausefail
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418 ld c, $0F ; First, wait until an interrupt happens...
419.wait: ld a, [c]
00573fd5 420 and $04
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421 cp 0
422 jr z, .wait
423 ei ; Now make sure that an IRQ didn't happen on EI/DI
424 di
425 ld a, [c]
00573fd5 426 and $04
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427 cp 0
428 jr z, .fail
00573fd5 429 ld hl, .dicausefail
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430 ei ; Make sure that an IRQ does happen on EI/NOP/DI
431 nop
00573fd5 432 nop
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433 di
434 ld a, [c]
00573fd5 435 and $04
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436 cp 0
437 jr nz, .fail
438 ei
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439
440 ld hl, .ok
441 call puts
442 ret
443.fail:
f9000d73 444 ei
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445 call puts
446 ld hl, .testfailed
447 call puts
448 ret
449.insnteststr:
450 db "Testing instructions... ",0
451.pushpopfail:
452 db "PUSH/POP",0
453.ff:
454 db $FF
455.xorhlfail:
456 db "XOR [HL]",0
457.jphlfail:
458 db "JP [HL]",0
459.jrfail:
460 db "JR",0
461.cpfail:
462 db "CP",0
463.cplfail:
464 db "CPL",0
465.inc16fail:
466 db "INC16",0
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467.dinocausefail:
468 db "DI/EI does not cause interrupt",0
469.dicausefail:
470 db "DI/NOP/EI cause interrupt",0
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471.testfailed:
472 db " test failed.",$0D,$0A,0
473.ok:
474 db "OK!",$0D,$0A,0
475
476; Serial port manipulation functions.
477putc:
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478 ld c, $50
479 push af
480.waitport:
481 ld a,[c]
f888201b 482 cp $00
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483 jr nz,.waitport
484 pop af
485 ld [c],a
486 ret
487
488puts:
489 ld a, [hli]
f888201b 490 cp $00
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491 ret z
492 call putc
493 jr puts
fe3dc890 494
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