Fix ld (nn), sp, for real this time.

[fpgaboy.git] / core / insn_alu_a.v

`define INSN_alu_RLCA		3'b000
`define INSN_alu_RRCA		3'b001
`define INSN_alu_RLA		3'b010
`define INSN_alu_RRA		3'b011
`define INSN_alu_DAA		3'b100
`define INSN_alu_CPL		3'b101
`define INSN_alu_SCF		3'b110
`define INSN_alu_CCF		3'b111

`define INSN_ALU_A		9'b000xxx111

`ifdef LOCALWIRES
	/* Y U Q */
	/* Derived from MESS opc_main.h */
	wire [8:0] daa_tmp_n0_h = ((`_F & `FLAG_H) || (`_A[3:0] > 9)) ? {1'b0,`_A} + 9'h06 : {1'b0,`_A};
	wire [8:0] daa_tmp_n0 = ((`_F & `FLAG_C) || (daa_tmp_n0_h[8:4] > 9)) ? daa_tmp_n0_h + 9'h60 : daa_tmp_n0_h;
	
	wire [8:0] daa_tmp_n_h1 = (`_F & `FLAG_H) ? ({1'b0,`_A} - 9'h06) : {1'b0,`_A};
	wire [8:0] daa_tmp_n_h2 = ((`_F & `FLAG_H) && !(`_F & `FLAG_C)) ? {1'b0,daa_tmp_n_h1[7:0]} : daa_tmp_n_h1;
	wire [8:0] daa_tmp_n = (`_F & `FLAG_C) ? (daa_tmp_n_h2 - 9'h60) : daa_tmp_n_h2;
	wire [8:0] daa_tmp = (`_F & `FLAG_N) ? daa_tmp_n : daa_tmp_n0;
`endif

`ifdef EXECUTE
	`INSN_ALU_A: begin
		`EXEC_NEWCYCLE
		`EXEC_INC_PC
	end
`endif

`ifdef WRITEBACK
	`INSN_ALU_A: begin
		case(opcode[5:3])
		`INSN_alu_RLCA: begin
			`_A <= {`_A[6:0],`_A[7]};
			`_F <= {`_F[7:5],`_A[7],`_F[3:0]};
		end
		`INSN_alu_RRCA: begin
			`_A <= {`_A[0],`_A[7:1]};
			`_F <= {`_F[7:5],`_A[0],`_F[3:0]};
		end
		`INSN_alu_RLA: begin
			`_A <= {`_A[6:0],`_F[4]};
			`_F <= {`_F[7:5],`_A[7],`_F[3:0]};
		end
		`INSN_alu_RRA: begin
			`_A <= {`_F[4],`_A[7:1]};
			`_F <= {`_F[7:5],`_A[0],`_F[3:0]};
		end
		`INSN_alu_DAA: begin
			`_A <= daa_tmp[7:0];
			`_F <= {
					(daa_tmp[7:0] == 0) ? 1'b1 : 8'b0, /* Z */
					2'b00, /* NH */
					daa_tmp[8], /* C */
					`_F[3:0]
				};
		end
		`INSN_alu_CPL: begin
			`_A <= ~`_A;
			`_F <= {`_F[7],1'b1,1'b1,`_F[4:0]};
		end
		`INSN_alu_SCF: begin
			`_F <= {`_F[7:5],1'b1,`_F[3:0]};
		end
		`INSN_alu_CCF: begin
			`_F <= {`_F[7:5],~`_F[4],`_F[3:0]};
		end
		endcase
	end
`endif