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(parent: d0e6b3c) | patch
Execute: Fix jumps while flush asserted. Set lr correctly in bl.
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Sat, 10 Jan 2009 04:36:15 +0000 (23:36 -0500)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Sat, 10 Jan 2009 04:36:15 +0000 (23:36 -0500)
commitdbf45af6b23216aa8fe299e334006fb3138d45f9
tree2fc55803430684a1ce7201cbb52ba5ab49327695tree | snapshot
parentd0e6b3ca86dc90cd78057c0df333d880985d6684commit | diff
Execute: Fix jumps while flush asserted.  Set lr correctly in bl.
Execute.v diff | blob | blame | history
FireARM pipelined ARM-like CPU implementation in Verilog
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