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Execute: Fix jumps while flush asserted. Set lr correctly in bl.
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Sat, 10 Jan 2009 04:36:15 +0000 (23:36 -0500)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Sat, 10 Jan 2009 04:36:15 +0000 (23:36 -0500)

No differences found
FireARM pipelined ARM-like CPU implementation in Verilog
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