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Fetch: Fix async reset to actually not do it wrong.
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Sat, 24 Jan 2009 09:31:18 +0000 (04:31 -0500)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Sat, 24 Jan 2009 09:31:18 +0000 (04:31 -0500)

No differences found
FireARM pipelined ARM-like CPU implementation in Verilog
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