]> Joshua Wise's Git repositories - firearm.git/commitdiff
Add a jump test
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Mon, 5 Jan 2009 09:18:07 +0000 (04:18 -0500)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Mon, 5 Jan 2009 09:18:07 +0000 (04:18 -0500)
ram.comments.hex
ram.hex
system.v

index c2c42a36c99a05a974c6447ff6fa053b0217938a..bffc93bef7cb0c897af19e21d78981cdb4222b7b 100644 (file)
@@ -25,6 +25,10 @@ E0017361  // and r7, r1, r1, ror #6
 E180F081
 E180F081
 E180F081
+EA000000 // jump forward
+EBFFFFFF // whirrr, skipped the first time
+E1A00000 // nop
+EBFFFFFD // jump back
 E0000000
 E0000000
 E0000000
diff --git a/ram.hex b/ram.hex
index 03c562da1a6ffc2b5742bb2dd6681f5d3bd8fe57..9f19cbb64c190c7ee81a557755b2397d9b4a93ad 100644 (file)
--- a/ram.hex
+++ b/ram.hex
@@ -20,6 +20,10 @@ E0017361
 E180F081
 E180F081
 E180F081
+EA000000
+EBFFFFFF
+E1A00000
+EAFFFFFD
 E0000000
 E0000000
 E0000000
index 736e6f2b2841cb83d11c9a8284258826348c462f..8ab3e23cb6370b8cac6853d58d21610b90410b91 100644 (file)
--- a/system.v
+++ b/system.v
@@ -124,6 +124,6 @@ module System(input clk);
                $display("%3d: FETCH:            Bubble: %d, Instruction: %08x, PC: %08x", clockno, bubble_out_fetch, insn_out_fetch, pc_out_fetch);
                $display("%3d: ISSUE:  Stall: %d, Bubble: %d, Instruction: %08x, PC: %08x", clockno, stall_cause_issue, bubble_out_issue, insn_out_issue, pc_out_issue);
                $display("%3d: DECODE:                      op1 %08x, op2 %08x, op3 %08x, carry %d", clockno, decode_out_op0, decode_out_op1, decode_out_op2, decode_out_carry);
-               $display("%3d: EXEC:   Stall: %d, Bubble: %d, Output: %d, [%08x -> %d]", clockno, stall_cause_execute, execute_out_bubble, execute_out_write_reg, execute_out_write_data, execute_out_write_num);
+               $display("%3d: EXEC:   Stall: %d, Bubble: %d, Reg: %d, [%08x -> %d], Jmp: %d [%08x]", clockno, stall_cause_execute, execute_out_bubble, execute_out_write_reg, execute_out_write_data, execute_out_write_num, jmp, jmppc);
        end
 endmodule
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