ICache and DCache: Do not accept fill data if the bus_ready is actually intended...

[firearm.git] / Execute.v

diff --git a/Execute.v b/Execute.v
index 38a192ff95f56fd3464915d0bb3bfc02e5bddaf4..ab204a0610a41065c5390366a38ab610b52b42e3 100644 (file)
--- a/Execute.v
+++ b/Execute.v
@@ -171,12 +171,12 @@ module Execute(
                begin end
                `DECODE_BRANCH:
                begin
-                       if(!inbubble) begin
+                       if(!inbubble && !flush) begin
                                jmppc = pc + op0 + 32'h8;
                                if(insn[24]) begin
                                        next_write_reg = 1;
                                        next_write_num = 4'hE; /* link register */
-                                       next_write_data = pc - 32'h4;
+                                       next_write_data = pc + 32'h4;
                                end
                                jmp = 1'b1;
                        end