busarb.v

   1 module BusArbiter(
   2         input [7:0] bus_req,
   3         output reg [7:0] bus_ack);
   4
   5         always @(*)
   6                 casex (bus_req)
   7                 8'b00000000: bus_ack <= 8'b00000000;
   8                 8'bxxxxxxx1: bus_ack <= 8'b00000001;
   9                 8'bxxxxxx10: bus_ack <= 8'b00000010;
  10                 8'bxxxxx100: bus_ack <= 8'b00000100;
  11                 8'bxxxx1000: bus_ack <= 8'b00001000;
  12                 8'bxxx10000: bus_ack <= 8'b00010000;
  13                 8'bxx100000: bus_ack <= 8'b00100000;
  14                 8'bx1000000: bus_ack <= 8'b01000000;
  15                 8'b10000000: bus_ack <= 8'b10000000;
  16                 endcase
  17 endmodule