3         output reg [7:0] bus_ack);
 
   7                 8'b00000000: bus_ack = 8'b00000000;
 
   8                 8'b???????1: bus_ack = 8'b00000001;
 
   9                 8'b??????10: bus_ack = 8'b00000010;
 
  10                 8'b?????100: bus_ack = 8'b00000100;
 
  11                 8'b????1000: bus_ack = 8'b00001000;
 
  12                 8'b???10000: bus_ack = 8'b00010000;
 
  13                 8'b??100000: bus_ack = 8'b00100000;
 
  14                 8'b?1000000: bus_ack = 8'b01000000;
 
  15                 8'b10000000: bus_ack = 8'b10000000;