Add icache kind of
[firearm.git] / icache.v
CommitLineData
7e757d70
JW
1/* 16 cache entries, 64-byte long cache lines */
2
3module ICache(
4 input clk,
5 input [31:0] rd_addr,
6 input rd_req,
7 output reg rd_wait,
8 output reg [31:0] rd_data);
9
10 /* [31 tag 11] [10 cache index 7] [5 data index 0]
11 * so the data index is 6 bits long
12 * so the cache index is 4 bits long
13 * so the tag is 21 bits long. c.c
14 */
15
16 reg cache_valid [15:0];
17 reg [20:0] cache_tags [15:0];
18 reg [31:0] cache_data [15:0] [7:0];
19
20 initial
21 for (i = 0; i < 16; i = i + 1)
22 cache_valid[i] <= 0;
23
24 wire [5:0] rd_didx = rd_addr[5:0];
25 wire [3:0] rd_didx_word = rd_didx[5:2];
26 wire [3:0] rd_idx = rd_addr[10:7];
27 wire [20:0] rd_tag = rd_addr[31:11];
28
29 always @(*) begin /* XXX does this work nowadays? */
30 rd_wait = !(cache_valid[rd_idx] && (cache_tags[rd_idx] == rd_tag));
31 rd_data = cache_data[rd_idx][rd_didx_word];
32 end
33endmodule
This page took 0.017045 seconds and 4 git commands to generate.