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Optimization baseline, 70.493MHz, 4913 Slices, 1843 slice FFs, 9065 LUTs
[mandelfpga.git] / ctoreadmemb.c
2008-03-15 Joshua WiseInitial revision -- unknown as to whether it works... blob | commitdiff | raw
Pipelined realtime renderer of the Mandelbrot set on a Xilinx FPGA
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