add comment and sim build rule
[mandelfpga.git] / MandelTop.ucf
CommitLineData
ae2d004d
JW
1NET "gclk" LOC = "b8";
2NET "dcmok" LOC = "j14";
3NET "vs" LOC = "u3" |SLEW = "fast";
4NET "hs" LOC = "t4" |SLEW = "fast";
5NET "red<2>" LOC = "r8";
6NET "red<1>" LOC = "t8";
7NET "red<0>" LOC = "r9";
8NET "green<2>" LOC = "p6";
9NET "green<1>" LOC = "p8";
10NET "green<0>" LOC = "n8";
11NET "blue<1>" LOC = "u4";
12NET "blue<0>" LOC = "u5";
13NET "left" LOC = "b18";
14NET "up" LOC = "d18";
15NET "down" LOC = "e18";
16NET "right" LOC = "h13";
17NET "scale<2>" LOC = "k18";
18NET "scale<1>" LOC = "h18";
19NET "scale<0>" LOC = "g18";
20NET "rst" LOC = "r17";
21NET "cycle" LOC = "n17";
22NET "logooff" LOC = "l13";
23TEMPERATURE = 40 ;
24NET "gclk" TNM_NET = gclk;
25TIMESPEC TS_gclk = PERIOD "gclk" 50 MHz HIGH 50%;
26NET "mclk" TNM_NET = mclk;
27TIMESPEC TS_mclk = PERIOD "mclk" 75 MHz HIGH 50%;
This page took 0.020835 seconds and 4 git commands to generate.