INC -> INCDEC

diff --git a/GBZ80Core.v b/GBZ80Core.v
index af5574fd2892cd056bcb3a2c1d1da16d9f654fe5..33e7be6a12e18a4cafe5fdf9013fc4bd2f1e2b35 100644 (file)
--- a/GBZ80Core.v
+++ b/GBZ80Core.v
@@ -69,6 +69,8 @@
 `define INSN_VOP_INTR          8'b11111100     // 0xFC is grabbed by the fetch if there is an interrupt pending.
 `define INSN_DI                        8'b11110011
 `define INSN_EI                        8'b11111011
+`define INSN_INCDEC_HL         8'b0011010x
+`define INSN_INCDEC_reg8       8'b00xxx10x
 
 `define INSN_cc_NZ             2'b00
 `define INSN_cc_Z              2'b01

diff --git a/allinsns.v b/allinsns.v
index fbcca503671bba2c390b4f8a92dbbf9d17b30f63..0b2e51c953edd20d0c6844d48786673fcc0401ff 100644 (file)
--- a/allinsns.v
+++ b/allinsns.v
@@ -21,3 +21,5 @@
 `include "insn_incdec16.v"
 `include "insn_vop_intr.v"
 `include "insn_di-ei.v"
+`include "insn_incdec_hl.v"
+`include "insn_incdec_reg8.v"
\ No newline at end of file

diff --git a/insn_incdec_hl.v b/insn_incdec_hl.v
new file mode 100644 (file)
index 0000000..abfe495
--- /dev/null
+++ b/insn_incdec_hl.v
@@ -0,0 +1,18 @@
+`ifdef EXECUTE
+       `INSN_INCDEC_HL: begin
+               case (cycle)
+               0:      `EXEC_READ(`_HL)
+               1:      `EXEC_WRITE(`_HL, rdata + (opcode[0] ? 8'hFF : 8'h01))
+               2:      begin
+                               `EXEC_INC_PC
+                               `EXEC_NEWCYCLE
+                       end
+               endcase
+       end
+`endif
+
+`ifdef WRITEBACK
+       `INSN_INCDEC_HL: begin
+               /* meh meh */
+       end
+`endif

diff --git a/insn_incdec_reg8.v b/insn_incdec_reg8.v
new file mode 100644 (file)
index 0000000..78f8b5a
--- /dev/null
+++ b/insn_incdec_reg8.v
@@ -0,0 +1,29 @@
+`ifdef EXECUTE
+       `INSN_INCDEC_reg8: begin
+               `EXEC_INC_PC
+               `EXEC_NEWCYCLE
+               case (opcode[5:3])
+               `INSN_reg_A:    tmp <= `_A;
+               `INSN_reg_B:    tmp <= `_B;
+               `INSN_reg_C:    tmp <= `_C;
+               `INSN_reg_D:    tmp <= `_D;
+               `INSN_reg_E:    tmp <= `_E;
+               `INSN_reg_H:    tmp <= `_H;
+               `INSN_reg_L:    tmp <= `_L;
+               endcase
+       end
+`endif
+
+`ifdef WRITEBACK
+       `INSN_INCDEC_reg8: begin
+               case (opcode[5:3])
+               `INSN_reg_A:    `_A <= tmp + (opcode[0] ? 8'hFF : 8'h01);
+               `INSN_reg_B:    `_B <= tmp + (opcode[0] ? 8'hFF : 8'h01);
+               `INSN_reg_C:    `_C <= tmp + (opcode[0] ? 8'hFF : 8'h01);
+               `INSN_reg_D:    `_D <= tmp + (opcode[0] ? 8'hFF : 8'h01);
+               `INSN_reg_E:    `_E <= tmp + (opcode[0] ? 8'hFF : 8'h01);
+               `INSN_reg_H:    `_H <= tmp + (opcode[0] ? 8'hFF : 8'h01);
+               `INSN_reg_L:    `_L <= tmp + (opcode[0] ? 8'hFF : 8'h01);
+               endcase
+       end
+`endif