fix tests 9 and 10

diff --git a/broken-tests b/broken-tests
index 31f155e973d86da08a5847c5a6fb78d7be8b52cf..5ef0ec7f69a41629bdec7024da0f560d439b3cf5 100644 (file)
--- a/broken-tests
+++ b/broken-tests
@@ -17,12 +17,5 @@ TEST 07: Immediate insns
 TEST 08: Register insns
 
 TEST 09: BC/DE/HL arith
 TEST 08: Register insns
 
 TEST 09: BC/DE/HL arith

-09 (ADD HL, BC)
-19 (ADD HL, DE)

 
 TEST 10: SP/HL instructions
 
 TEST 10: SP/HL instructions

-39 (ADD HL, SP)
-E8 01 (ADD SP, 1)
-E8 FF (ADD SP, -1)
-F8 01 (LD HL, SP+1)
-F8 FF (LD HL, SP-1)
\ No newline at end of file

diff --git a/core/insn_add_hl.v b/core/insn_add_hl.v
index 6bd7e7a8dc17e8599cf6497eeb46b835cca827fd..66a047fddceb26c5f45038747cc09dae63941d2c 100644 (file)
--- a/core/insn_add_hl.v
+++ b/core/insn_add_hl.v
@@ -23,7 +23,7 @@
                1:      begin
                                `_F <=  { /* Z */ `_F[7],
                                          /* N */ 1'b0,
                1:      begin
                                `_F <=  { /* Z */ `_F[7],
                                          /* N */ 1'b0,

-                                         /* H */ (({`_HL} + {tmp,tmp2}) & 16'h1000) ? 1'b1 : 1'b0,
+                                         /* H */ (({1'b0,`_H[3:0],`_L} + {1'b0,tmp[3:0],tmp2}) & 13'h1000) ? 1'b1 : 1'b0,

                                          /* C */ (({1'b0,`_HL} + {1'b0,tmp,tmp2}) & 17'h10000) ? 1'b1 : 1'b0,
                                          `_F[3:0]
                                        };
                                          /* C */ (({1'b0,`_HL} + {1'b0,tmp,tmp2}) & 17'h10000) ? 1'b1 : 1'b0,
                                          `_F[3:0]
                                        };

diff --git a/core/insn_add_sp_imm8.v b/core/insn_add_sp_imm8.v
index 3350bdc5f18c3bb07f082f934799e5dd9dd651d3..ff5da37c3d760b9a7c9fe101f3bf78edca6e3561 100644 (file)
--- a/core/insn_add_sp_imm8.v
+++ b/core/insn_add_sp_imm8.v
@@ -20,7 +20,15 @@
 `ifdef WRITEBACK
        `INSN_ADD_SP_IMM8: begin
                case (cycle)
 `ifdef WRITEBACK
        `INSN_ADD_SP_IMM8: begin
                case (cycle)

-               2:      `_SP <= `_SP + {rdata[7] ? 8'hFF : 8'h00, rdata};
+               2:      begin
+                               `_SP <= `_SP + {rdata[7] ? 8'hFF : 8'h00, rdata};
+                               `_F <= {
+                                       2'b00,
+                                       (({1'b0,`_SPL[3:0]} + {1'b0,rdata[3:0]}) & 5'h10) ? 1'b1 : 1'b0,
+                                       (({1'b0,`_SPL} + {1'b0,rdata}) & 9'h100) ? 1'b1 : 1'b0,
+                                       `_F[3:0]
+                                       };
+                       end

                endcase
        end
 `endif
                endcase
        end
 `endif

diff --git a/core/insn_ldhl_sp_imm8.v b/core/insn_ldhl_sp_imm8.v
index 688465ab03bf5be8d122061881119dc7ec428283..3b017a378be3a1adc70cea78031e5ad6c7cfecda 100644 (file)
--- a/core/insn_ldhl_sp_imm8.v
+++ b/core/insn_ldhl_sp_imm8.v
@@ -20,7 +20,15 @@
 `ifdef WRITEBACK
        `INSN_LDHL_SP_IMM8: begin
                case (cycle)
 `ifdef WRITEBACK
        `INSN_LDHL_SP_IMM8: begin
                case (cycle)

-               2:      `_HL <= `_SP + {rdata[7] ? 8'hFF : 8'h00, rdata};
+               2:      begin
+                               `_HL <= `_SP + {rdata[7] ? 8'hFF : 8'h00, rdata};
+                               `_F <= {
+                                       2'b00,
+                                       (({1'b0,`_SPL[3:0]} + {1'b0,rdata[3:0]}) & 5'h10) ? 1'b1 : 1'b0,
+                                       (({1'b0,`_SPL} + {1'b0,rdata}) & 9'h100) ? 1'b1 : 1'b0,
+                                       `_F[3:0]
+                                       };
+                       end

                endcase
        end
 `endif
                endcase
        end
 `endif