NET "g<1>" LOC = "p8";
NET "g<0>" LOC = "n8";
NET "b<1>" LOC = "u4";
-NET "b<0>" LOC = "u5";
\ No newline at end of file
+NET "b<0>" LOC = "u5";
+
+NET "soundl" LOC = "l15" | SLEW = "fast";
+NET "soundr" LOC = "k12" | SLEW = "fast";
\ No newline at end of file
output wire [7:0] seven,
output wire hs, vs,
output wire [2:0] r, g,
- output wire [1:0] b);
+ output wire [1:0] b,
+ output wire soundl, soundr);
wire xtalb, clk, vgaclk;
IBUFG iclkbuf(.O(xtalb), .I(xtal));
.buttons(0),
.master(irq),
.jaddr(jaddr));
+
+ Soundcore sound(
+ .core_clk(clk),
+ .rd(rd),
+ .wr(wr),
+ .addr(addr),
+ .data(data),
+ .snd_data_l(soundl),
+ .snd_data_r(soundr));
endmodule
module TestBench();