Cut 1 at button integration

[fpgaboy.git] / Makefile

diff --git a/Makefile b/Makefile
index 466b640ac85801f0275c3e3c7a42ed2a2ccbfb76..f42e5b99520a30ccd94163f5a48b78a9e71c77fb 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,21 +1,24 @@
-VLOGS = 7seg.v GBZ80Core.v insn_call-callcc.v insn_incdec16.v \
-       insn_jr-jrcc.v insn_ld_reg_hl.v insn_ld_reg_reg.v insn_nop.v \
-       insn_ret-retcc.v Interrupt.v Uart.v allinsns.v insn_alu8.v \
-       insn_di-ei.v insn_jp_hl.v insn_ldh_ac.v insn_ld_reg_imm16.v \
-       insn_ld_sp_hl.v insn_pop_reg.v insn_rst.v System.v CPUDCM.v \
-       insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \
+VLOGS = 7seg.v Framebuffer.v GBZ80Core.v Interrupt.v LCDC.v Sound1.v \
+       Sound2.v Soundcore.v System.v Timer.v Uart.v  Buttons.v
+
+VLOGS_ALL = $(VLOGS) insn_call-callcc.v insn_incdec16.v insn_jr-jrcc.v \
+       insn_ld_reg_hl.v insn_ld_reg_reg.v insn_nop.v insn_ret-retcc.v \
+       allinsns.v insn_alu8.v insn_di-ei.v insn_jp_hl.v insn_ldh_ac.v \
+       insn_ld_reg_imm16.v insn_ld_sp_hl.v insn_pop_reg.v insn_rst.v \
+       CPUDCM.v insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \

        insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \
        insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \

-       Timer.v LCDC.v insn_ldm8_a.v insn_ldm16_a.v Framebuffer.v \
-       insn_ldbcde_a.v insn_alu_ext.v insn_bit.v insn_two_byte.v \
-       insn_incdec_reg8.v
+       insn_ldm8_a.v insn_ldm16_a.v insn_ldbcde_a.v insn_alu_ext.v \
+       insn_bit.v insn_two_byte.v insn_incdec_reg8.v insn_add_hl.v

 
 

-all: CoreTop_rom.svf CoreTop_diag.svf CoreTop_bootrom.svf CoreTop.twr
+all: CoreTop.svf

 
 

-CoreTop.ngc: CoreTop.xst CoreTop.prj $(VLOGS)
+sim: CoreTop_isim.exe
+
+CoreTop.ngc: CoreTop.xst CoreTop.prj $(VLOGS_ALL) fpgaboot.hex gbboot.hex

        xst -ifn CoreTop.xst -ofn CoreTop.syr
 
 CoreTop.ngd: CoreTop.ngc foo.bmm CoreTop.ucf
        xst -ifn CoreTop.xst -ofn CoreTop.syr
 
 CoreTop.ngd: CoreTop.ngc foo.bmm CoreTop.ucf

-       ngdbuild -dd _ngo -uc CoreTop.ucf -nt timestamp -bm "foo.bmm" -p xc3s500e-fg320-5 "CoreTop.ngc" CoreTop.ngd
+       ngdbuild -dd _ngo -uc CoreTop.ucf -nt timestamp -p xc3s500e-fg320-5 "CoreTop.ngc" CoreTop.ngd

 
 CoreTop_map.ncd: CoreTop.ngd
        map -p xc3s500e-fg320-5 -cm area -pr off -k 4 -c 100 -o CoreTop_map.ncd CoreTop.ngd CoreTop.pcf
 
 CoreTop_map.ncd: CoreTop.ngd
        map -p xc3s500e-fg320-5 -cm area -pr off -k 4 -c 100 -o CoreTop_map.ncd CoreTop.ngd CoreTop.pcf


@@ -39,6 +42,10 @@ netgen/par/.CoreTop_timesim.v_work: netgen/par/CoreTop_timesim.v
 CoreTop_isim_par.exe: netgen/par/.CoreTop_timesim.v_work
        fuse -lib simprims_ver -lib unisims_ver -lib unimacro_ver -lib xilinxcorelib_ver -o CoreTop_isim_par.exe netgen/par/CoreTop_timesim.v -top CoreTop -top glbl
 
 CoreTop_isim_par.exe: netgen/par/.CoreTop_timesim.v_work
        fuse -lib simprims_ver -lib unisims_ver -lib unimacro_ver -lib xilinxcorelib_ver -o CoreTop_isim_par.exe netgen/par/CoreTop_timesim.v -top CoreTop -top glbl
 

+CoreTop_isim.exe: $(VLOGS_ALL)
+       vlogcomp -d isim $(VLOGS) 
+       fuse -t CoreTop -o CoreTop_isim.exe
+

 parsim: CoreTop_isim_par.exe
 
 %.o: %.asm
 parsim: CoreTop_isim_par.exe
 
 %.o: %.asm


@@ -56,10 +63,11 @@ parsim: CoreTop_isim_par.exe
 %.mem: %.bin mashrom
        ./mashrom < $< > $@
 
 %.mem: %.bin mashrom
        ./mashrom < $< > $@
 

-CoreTop_%.bit: %.mem CoreTop.bit foo_bd.bmm
-       data2mem -bm foo_bd.bmm -bd $< -bt CoreTop.bit -o b $@
+fpgaboot.hex: fpgaboot.bin mashrom
+       ./mashrom 256 < $< > $@
+

 
 

-CoreTop_%.svf: CoreTop_%.bit impact.cmd
+CoreTop.svf: CoreTop.bit impact.cmd

        sed -e s/XXX/$(subst .bit,,$<)/ < impact.cmd > tmp.cmd
        impact -batch tmp.cmd
 
        sed -e s/XXX/$(subst .bit,,$<)/ < impact.cmd > tmp.cmd
        impact -batch tmp.cmd