`define INSN_alu_SCF 3'b110
`define INSN_alu_CCF 3'b111
-`define EXEC_INC_PC \
- `_PC <= `_PC + 1
-`define EXEC_NEXTADDR_PCINC \
- address <= `_PC + 1
-`define EXEC_NEWCYCLE \
- begin newcycle <= 1; rd <= 1; wr <= 0; end
-`define EXEC_WRITE(ad, da) \
- begin address <= (ad); \
- wdata <= (da); \
- wr <= 1; end
-`define EXEC_READ(ad) \
- begin address <= (ad); \
- rd <= 1; end
+`define EXEC_INC_PC `_PC <= `_PC + 1;
+`define EXEC_NEXTADDR_PCINC address <= `_PC + 1;
+`define EXEC_NEWCYCLE begin newcycle <= 1; rd <= 1; wr <= 0; end
+`define EXEC_WRITE(ad, da) begin address <= (ad); wdata <= (da); wr <= 1; end end
+`define EXEC_READ(ad) begin address <= (ad); rd <= 1; end end
module GBZ80Core(
input clk,
state <= `STATE_EXECUTE;
end
`STATE_EXECUTE: begin
-
casex (opcode)
`define EXECUTE
`include "allinsns.v"
`undef EXECUTE
- `INSN_DI: begin
- `EXEC_NEWCYCLE;
- `EXEC_INC_PC;
- end
- `INSN_EI: begin
- `EXEC_NEWCYCLE;
- `EXEC_INC_PC;
- end
default:
$stop;
endcase