Ethernet TX support
[fpgaboy.git] / core / GBZ80Core.v
index b5a502c..4a1e256 100644 (file)
@@ -233,8 +233,10 @@ module GBZ80Core(
                        end
                        wr <= 0;
                        rd <= 0;
+`ifdef isim
                        address <= 16'bxxxxxxxxxxxxxxxx;        // Make it obvious if something of type has happened.
                        wdata <= 8'bxxxxxxxx;
+`endif
                        state <= `STATE_EXECUTE;
                end
                `STATE_EXECUTE: begin
@@ -247,7 +249,10 @@ module GBZ80Core(
                        `include "allinsns.v"
                        `undef EXECUTE
                        default:
+                       begin
+                               address <= {7'h78,opcode};      // Have the CPU tell you F0xx if something's gone wrong.
                                $stop;
+                       end
                        endcase
                        state <= `STATE_WRITEBACK;
                end
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