]> Joshua Wise's Git repositories - fpgaboy.git/blobdiff - 7seg.v
Some reworks to prepare for transition to makefile. Stack bugfixes.
[fpgaboy.git] / 7seg.v
diff --git a/7seg.v b/7seg.v
index 8e91b038669690cbb954c8f7178d602cda72eb30..c64e7d5ceb9af8a76d981ae140c27c364d39823c 100644 (file)
--- a/7seg.v
+++ b/7seg.v
@@ -6,7 +6,7 @@ module AddrMon(
        input freeze
        );
 
        input freeze
        );
 
-       reg [10:0] clkdv;
+       reg [5:0] clkdv;
        reg [1:0] dcount;
        
        reg [15:0] latch = 0;
        reg [1:0] dcount;
        
        reg [15:0] latch = 0;
@@ -17,42 +17,40 @@ module AddrMon(
                (dcount == 2'b10) ? latch[11:8] :
                                     latch[15:12];
 
                (dcount == 2'b10) ? latch[11:8] :
                                     latch[15:12];
 
-       always @ (negedge clk)
-       begin
-               clkdv <= clkdv + 1;
-               if (~freeze)
-                       latch <= addr;
-       end
+       always @ (negedge clk) begin
+               if (clkdv == 31) begin
+                       clkdv <= 0;
+                       dcount <= dcount + 1;
 
 
-       always @ (posedge clkdv[10])
-       begin
-               dcount <= dcount + 1;
+                       case(dcount)
+                       2'b00: digit <= 4'b1110;
+                       2'b01: digit <= 4'b1101;
+                       2'b10: digit <= 4'b1011;
+                       2'b11: digit <= 4'b0111;
+                       endcase
 
 
-               case(dcount)
-               2'b00: digit <= 4'b1110;
-               2'b01: digit <= 4'b1101;
-               2'b10: digit <= 4'b1011;
-               2'b11: digit <= 4'b0111;
-               endcase
-
-               case(curval)
-                            /* ABCDEFGP */
-               4'h0: out <= ~8'b11111100;
-               4'h1: out <= ~8'b01100000;
-               4'h2: out <= ~8'b11011010;
-               4'h3: out <= ~8'b11110010;
-               4'h4: out <= ~8'b01100110;
-               4'h5: out <= ~8'b10110110;
-               4'h6: out <= ~8'b10111110;
-               4'h7: out <= ~8'b11100000;
-               4'h8: out <= ~8'b11111110;
-               4'h9: out <= ~8'b11110110;
-               4'hA: out <= ~8'b11101110;
-               4'hB: out <= ~8'b00111110;
-               4'hC: out <= ~8'b10011100;
-               4'hD: out <= ~8'b01111010;
-               4'hE: out <= ~8'b10011110;
-               4'hF: out <= ~8'b10001110;
-               endcase
+                       case(curval)
+                                                       /* ABCDEFGP */
+                       4'h0: out <= ~8'b11111100;
+                       4'h1: out <= ~8'b01100000;
+                       4'h2: out <= ~8'b11011010;
+                       4'h3: out <= ~8'b11110010;
+                       4'h4: out <= ~8'b01100110;
+                       4'h5: out <= ~8'b10110110;
+                       4'h6: out <= ~8'b10111110;
+                       4'h7: out <= ~8'b11100000;
+                       4'h8: out <= ~8'b11111110;
+                       4'h9: out <= ~8'b11110110;
+                       4'hA: out <= ~8'b11101110;
+                       4'hB: out <= ~8'b00111110;
+                       4'hC: out <= ~8'b10011100;
+                       4'hD: out <= ~8'b01111010;
+                       4'hE: out <= ~8'b10011110;
+                       4'hF: out <= ~8'b10001110;
+                       endcase
+               end else
+                       clkdv <= clkdv + 1;
+               if (~freeze)
+                       latch <= addr;
        end
 endmodule
        end
 endmodule
This page took 0.025842 seconds and 4 git commands to generate.