core/insn_ld_hl_reg.v

   1 `define INSN_LD_HL_reg          9'b001110xxx
   2
   3 `ifdef EXECUTE
   4         `INSN_LD_HL_reg: begin
   5                 case (cycle)
   6                 0:      begin
   7                                 case (opcode[2:0])
   8                                 `INSN_reg_A:    wdata <= `_A;
   9                                 `INSN_reg_B:    wdata <= `_B;
  10                                 `INSN_reg_C:    wdata <= `_C;
  11                                 `INSN_reg_D:    wdata <= `_D;
  12                                 `INSN_reg_E:    wdata <= `_E;
  13                                 `INSN_reg_H:    wdata <= `_H;
  14                                 `INSN_reg_L:    wdata <= `_L;
  15                                 endcase
  16                                 address <= `_HL;
  17                                 wr <= 1; rd <= 0;
  18                         end
  19                 1:      begin
  20                                 `EXEC_INC_PC
  21                                 `EXEC_NEWCYCLE
  22                         end
  23                 endcase
  24         end
  25 `endif
  26
  27 `ifdef WRITEBACK
  28         `INSN_LD_HL_reg: begin
  29                 /* Nothing of interest here */
  30         end
  31 `endif