insn_ret-retcc.v

   1 `ifdef EXECUTE
   2         `INSN_RET,`INSN_RETCC: begin
   3                 case (cycle)
   4                 0:      begin
   5                                 rd <= 1;
   6                                 address <= {registers[`REG_SPH],registers[`REG_SPL]};
   7                         end
   8                 1:      begin   // SPECIAL CASE: cycle does NOT increase linearly with ret!
   9                                 `EXEC_INC_PC;   // cycle 1 is skipped if we are not retcc
  10                                 case (opcode[4:3])
  11                                 `INSN_cc_NZ:    if (registers[`REG_F][7]) begin `EXEC_NEWCYCLE; end
  12                                 `INSN_cc_Z:             if (~registers[`REG_F][7]) begin `EXEC_NEWCYCLE; end
  13                                 `INSN_cc_NC:    if (registers[`REG_F][4]) begin `EXEC_NEWCYCLE; end
  14                                 `INSN_cc_C:             if (~registers[`REG_F][4]) begin `EXEC_NEWCYCLE; end
  15                                 endcase
  16                                 rd <= 1;
  17                                 address <= {registers[`REG_SPH],registers[`REG_SPL]};
  18                         end
  19                 2:      begin
  20                                 rd <= 1;
  21                                 address <= {registers[`REG_SPH],registers[`REG_SPL]} + 1;
  22                         end
  23                 3:      begin /* twiddle thumbs */ end
  24                 4:      begin
  25                                 `EXEC_NEWCYCLE;
  26                                 // do NOT increment PC!
  27                         end
  28                 endcase
  29         end
  30 `endif
  31
  32 `ifdef WRITEBACK
  33         `INSN_RET,`INSN_RETCC: begin
  34                 case (cycle)
  35                 0:      if (opcode[0])  // i.e., not RETCC
  36                                 cycle <= 1;     // Skip cycle 1; it gets incremented on the next round.
  37                 1:      begin /* Nothing need happen here. */ end
  38                 2:      registers[`REG_PCL] <= rdata;
  39                 3:      registers[`REG_PCH] <= rdata;
  40                 4:      begin
  41                                 {registers[`REG_SPH],registers[`REG_SPL]} <=
  42                                         {registers[`REG_SPH],registers[`REG_SPL]} + 2;
  43                                 if (opcode[4] && opcode[0])     /* RETI */
  44                                         ie <= 1;
  45                         end
  46                 endcase
  47         end
  48 `endif