]> Joshua Wise's Git repositories - fpgaboy.git/blob - insn_ld_reg_reg.v
Make binwire a little bit more error-resistant
[fpgaboy.git] / insn_ld_reg_reg.v
1 `ifdef EXECUTE
2         `INSN_LD_reg_reg: begin
3                 `EXEC_INC_PC
4                 `EXEC_NEWCYCLE
5                 case (opcode[2:0])
6                 `INSN_reg_A:    tmp <= `_A;
7                 `INSN_reg_B:    tmp <= `_B;
8                 `INSN_reg_C:    tmp <= `_C;
9                 `INSN_reg_D:    tmp <= `_D;
10                 `INSN_reg_E:    tmp <= `_E;
11                 `INSN_reg_H:    tmp <= `_H;
12                 `INSN_reg_L:    tmp <= `_L;
13                 endcase
14         end
15 `endif
16
17 `ifdef WRITEBACK
18         `INSN_LD_reg_reg: begin
19                 case (opcode[5:3])
20                 `INSN_reg_A:    `_A <= tmp;
21                 `INSN_reg_B:    `_B <= tmp;
22                 `INSN_reg_C:    `_C <= tmp;
23                 `INSN_reg_D:    `_D <= tmp;
24                 `INSN_reg_E:    `_E <= tmp;
25                 `INSN_reg_H:    `_H <= tmp;
26                 `INSN_reg_L:    `_L <= tmp;
27                 endcase
28         end
29 `endif
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