Move the core to core/
[fpgaboy.git] / core / insn_add_hl.v
1 `ifdef EXECUTE
2         `INSN_ADD_HL: begin
3                 case (cycle)
4                 0:      case (opcode[5:4])
5                         `INSN_reg16_BC: {tmp,tmp2} <= `_BC;
6                         `INSN_reg16_DE: {tmp,tmp2} <= `_DE;
7                         `INSN_reg16_HL: {tmp,tmp2} <= `_HL;
8                         `INSN_reg16_SP: {tmp,tmp2} <= `_SP;
9                         endcase
10                 1:      begin
11                                 `EXEC_INC_PC
12                                 `EXEC_NEWCYCLE
13                         end
14                 endcase
15         end
16 `endif
17
18 `ifdef WRITEBACK
19         `INSN_ADD_HL: begin
20                 case (cycle)
21                 0:      {tmp,tmp2} <= `_HL + {tmp,tmp2};
22                 1:      begin
23                                 `_F <=  { /* Z */ `_F[7],
24                                           /* N */ 1'b0,
25                                           /* H */ (({`_HL} + {tmp,tmp2}) & 16'h1000) ? 1'b1 : 1'b0,
26                                           /* C */ (({1'b0,`_HL} + {1'b0,tmp,tmp2}) >> 16 == 1) ? 1'b1 : 1'b0,
27                                           `_F[3:0]
28                                         };
29                                 `_HL <= {tmp, tmp2};
30                         end
31                 endcase
32         end
33 `endif
This page took 0.018492 seconds and 4 git commands to generate.