ade83fe7a68d6381fbb57195db4c383a123eb0ce
[fpgaboy.git] / core / insn_ld_nn_sp.v
1 `define INSN_LD_NN_SP           9'b000001000
2
3 `ifdef EXECUTE
4         `INSN_LD_NN_SP: begin
5                 case (cycle)
6                 0:      begin
7                                 `EXEC_INC_PC
8                                 `EXEC_READ(`_PC + 16'h0001)
9                         end
10                 1:      begin
11                                 `EXEC_INC_PC
12                                 `EXEC_READ(`_PC + 16'h0001)
13                         end
14                 2:      begin
15                                 `EXEC_WRITE(({tmp, rdata}), `_SPL)
16                         end
17                 3:      begin
18                                 `EXEC_WRITE(({tmp, tmp2}), `_SPH)
19                         end
20                 4:      begin
21                                 `EXEC_NEWCYCLE
22                                 `EXEC_INC_PC
23                         end
24                 endcase
25         end
26 `endif
27
28 `ifdef WRITEBACK
29         `INSN_LD_NN_SP: begin
30                 case (cycle)
31                 0:      begin end
32                 1:      tmp <= rdata;
33                 2:      {tmp, tmp2} <= {tmp, rdata} + 1;
34                 3:      begin end
35                 4:      begin end
36                 endcase
37         end
38 `endif
39
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