Fix add sp, imm8 *sweatdrop*
[fpgaboy.git] / core / insn_alu8.v
1 `define INSN_ALU8               9'b010xxxxxx    // 10 xxx yyy
2 `define INSN_ALU8IMM            9'b011xxx110
3
4 `ifdef EXECUTE
5         `INSN_ALU8,`INSN_ALU8IMM: begin
6                 if ((opcode[7:6] == 2'b11) && (cycle == 0)) begin       // alu8imm
7                         `EXEC_INC_PC
8                         `EXEC_READ(`_PC + 1)
9                 end else if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 0))
10                         `EXEC_READ(`_HL)
11                 else begin
12                         `EXEC_NEWCYCLE
13                         `EXEC_INC_PC
14                         case (opcode[2:0])
15                         `INSN_reg_A:    tmp <= `_A;
16                         `INSN_reg_B:    tmp <= `_B;
17                         `INSN_reg_C:    tmp <= `_C;
18                         `INSN_reg_D:    tmp <= `_D;
19                         `INSN_reg_E:    tmp <= `_E;
20                         `INSN_reg_H:    tmp <= `_H;
21                         `INSN_reg_L:    tmp <= `_L;
22                         `INSN_reg_dHL:  tmp <= rdata;
23                         endcase
24                 end
25         end
26 `endif
27
28 `ifdef WRITEBACK
29         `INSN_ALU8,`INSN_ALU8IMM: begin
30                 if (((opcode[2:0] == `INSN_reg_dHL) || (opcode[7:6] == 2'b11)) && (cycle == 0)) begin
31                         /* Sit on our asses. */
32                 end else begin          /* Actually do the computation! */
33                         case (opcode[5:3])
34                         `INSN_alu_ADD: begin
35                                 `_A <= `_A + tmp;
36                                 `_F <=  { /* Z */ ((`_A + tmp) == 8'b0) ? 1'b1 : 1'b0,
37                                           /* N */ 1'b0,
38                                           /* H */ (({1'b0,`_A[3:0]} + {1'b0,tmp[3:0]}) >> 4 == 1) ? 1'b1 : 1'b0,
39                                           /* C */ (({1'b0,`_A} + {1'b0,tmp}) >> 8 == 1) ? 1'b1 : 1'b0,
40                                           `_F[3:0]
41                                         };
42                         end
43                         `INSN_alu_ADC: begin
44                                 `_A <= `_A + tmp + {7'b0,`_F[4]};
45                                 `_F <=  { /* Z */ ((`_A + tmp + {7'b0,`_F[4]}) == 8'b0) ? 1'b1 : 1'b0,
46                                           /* N */ 1'b0,
47                                           /* H */ (({1'b0,`_A[3:0]} + {1'b0,tmp[3:0]} + {4'b0,`_F[4]}) >> 4 == 1) ? 1'b1 : 1'b0,
48                                           /* C */ (({1'b0,`_A} + {1'b0,tmp} + {8'b0,`_F[4]}) >> 8 == 1) ? 1'b1 : 1'b0,
49                                           `_F[3:0]
50                                         };
51                         end
52                         `INSN_alu_SUB: begin
53                                 `_A <= `_A - tmp;
54                                 `_F <=  { /* Z */ (`_A == tmp) ? 1'b1 : 1'b0,
55                                           /* N */ 1'b1,
56                                           /* H */ (tmp[3:0] > `_A[3:0]) ? 1'b1 : 1'b0,
57                                           /* C */ (tmp > `_A) ? 1'b1 : 1'b0,
58                                           `_F[3:0]
59                                         };
60                         end
61                         `INSN_alu_SBC: begin
62                                 `_A <= `_A - (tmp + {7'b0,`_F[4]});
63                                 `_F <=  { /* Z */ ((`_A - (tmp + {7'b0,`_F[4]})) == 8'b0) ? 1'b1 : 1'b0,
64                                           /* N */ 1'b1,
65                                           /* H */ (({1'b0,tmp[3:0]} + {4'b0,`_F[4]}) > {1'b0,`_A[3:0]}) ? 1'b1 : 1'b0,
66                                           /* C */ (({1'b0,tmp} + {8'b0,`_F[4]}) > {1'b0,`_A[7:0]}) ? 1'b1 : 1'b0,
67                                           `_F[3:0]
68                                         };
69                         end
70                         `INSN_alu_AND: begin
71                                 `_A <= `_A & tmp;
72                                 `_F <=  { /* Z */ ((`_A & tmp) == 0) ? 1'b1 : 1'b0,
73                                           3'b010,
74                                           `_F[3:0]
75                                         };
76                         end
77                         `INSN_alu_OR: begin
78                                 `_A <= `_A | tmp;
79                                 `_F <=  { /* Z */ ((`_A | tmp) == 0) ? 1'b1 : 1'b0,
80                                           3'b000,
81                                           `_F[3:0]
82                                         };
83                         end
84                         `INSN_alu_XOR: begin
85                                 `_A <= `_A ^ tmp;
86                                 `_F <=  { /* Z */ ((`_A ^ tmp) == 0) ? 1'b1 : 1'b0,
87                                           3'b000,
88                                           `_F[3:0]
89                                         };
90                         end
91                         `INSN_alu_CP: begin
92                                 `_F <=  { /* Z */ (`_A == tmp) ? 1'b1 : 1'b0,
93                                           /* N */ 1'b1,
94                                           /* H */ (tmp[3:0] > `_A[3:0]) ? 1'b1 : 1'b0,
95                                           /* C */ (tmp > `_A) ? 1'b1 : 1'b0,
96                                           `_F[3:0]
97                                         };
98                         end
99                         default:
100                                 $stop;
101                         endcase
102                 end
103         end
104 `endif
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