Start refactoring instructions.
[fpgaboy.git] / insn_pop_reg.v
1 `ifdef EXECUTE
2         `INSN_POP_reg: begin    /* POP is 12 cycles! */
3                 case (cycle)
4                 0:      begin
5                                 rd <= 1;
6                                 address <= {registers[`REG_SPH],registers[`REG_SPL]};
7                         end
8                 1:      begin
9                                 rd <= 1;
10                                 address <= {registers[`REG_SPH],registers[`REG_SPL]} + 1;
11                         end
12                 2:      begin
13                                 `EXEC_NEWCYCLE;
14                                 `EXEC_INC_PC;
15                         end
16                 endcase
17         end
18 `endif
19
20 `ifdef WRITEBACK
21         `INSN_POP_reg: begin    /* POP is 12 cycles! */
22                 case (cycle)
23                 0:      begin end
24                 1:      begin
25                                 case (opcode[5:4])
26                                 `INSN_stack_AF: registers[`REG_F] <= rdata;
27                                 `INSN_stack_BC: registers[`REG_C] <= rdata;
28                                 `INSN_stack_DE: registers[`REG_E] <= rdata;
29                                 `INSN_stack_HL: registers[`REG_L] <= rdata;
30                                 endcase
31                         end
32                 2:      begin
33                                 case (opcode[5:4])
34                                 `INSN_stack_AF: registers[`REG_A] <= rdata;
35                                 `INSN_stack_BC: registers[`REG_B] <= rdata;
36                                 `INSN_stack_DE: registers[`REG_D] <= rdata;
37                                 `INSN_stack_HL: registers[`REG_H] <= rdata;
38                                 endcase
39                                 {registers[`REG_SPH],registers[`REG_SPL]} <=
40                                         {registers[`REG_SPH],registers[`REG_SPL]} + 2;
41                         end
42                 endcase
43         end
44 `endif
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