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[fpgaboy.git] / Framebuffer.v
1 `define XRES 640
2 `define XFPORCH 16
3 `define XSYNC 96
4 `define XBPORCH 48
5 `define YRES 480
6 `define YFPORCH 10
7 `define YSYNC 2
8 `define YBPORCH 25
9
10 `define XOFS ((640-160)/2)
11 `define YOFS ((480-144)/2)
12
13 module Framebuffer(
14         input lcdclk,
15         input lcdvs, lcdhs,
16         input [2:0] lcdr, lcdg, input [1:0] lcdb,
17         
18         input vgaclk,
19         output reg vgavs, vgahs,
20         output wire [2:0] vgar, vgag, output wire [1:0] vgab);
21         
22         reg [2:0] fb [23039:0];
23         
24         reg [7:0] lcdx = 8'h00;
25         reg [7:0] lcdy = 8'h00;
26         reg [15:0] lcdfb = 16'h0000;
27         
28         always @(posedge lcdclk)
29         begin
30                 /* We use BLOCKING assigns here. */
31                 if (lcdvs) begin
32                         lcdx <= 0;
33                         lcdy <= 0;
34                         lcdfb <= 0;
35                 end else if (lcdhs) begin
36                         lcdx <= 0;
37                         lcdy <= lcdy + 1;
38                 end else if (lcdx < 160) begin
39                         lcdx <= lcdx + 1;
40                         lcdfb <= lcdfb + 1;
41                 end
42         end
43         
44         reg [11:0] vgax = 0, vgay = 0;
45         reg [15:0] vgafb = 16'h0000;
46         
47         reg [2:0] failandloss;
48         assign {vgar, vgag, vgab} =
49                 ((vgax > `XOFS) && (vgax < (`XOFS + 161)) && (vgay > `YOFS) && (vgay < (`YOFS + 144))) ? {failandloss[2],2'b0,failandloss[1],2'b0,failandloss[0],1'b0} :
50                 ((vgax < 640) && (vgay < 480)) ? 8'b00000000 :
51                 8'b00000000;
52         
53         always @(posedge vgaclk)
54         begin
55                 if (vgax >= (`XRES + `XFPORCH + `XSYNC + `XBPORCH))
56                 begin
57                         if (vgay >= (`YRES + `YFPORCH + `YSYNC + `YBPORCH)) begin
58                                 vgafb <= 0;
59                                 vgay <= 0;
60                                 vgax <= 0;
61                         end else begin
62                                 vgay <= vgay + 1;
63                                 vgax <= 0;
64                         end
65                 end else
66                         vgax <= vgax + 1;
67                 
68                 vgahs <= (vgax >= (`XRES + `XFPORCH)) && (vgax < (`XRES + `XFPORCH + `XSYNC));
69                 vgavs <= (vgay >= (`YRES + `YFPORCH)) && (vgay < (`YRES + `YFPORCH + `YSYNC));
70                 
71                 if ((vgax > `XOFS) && (vgax < (`XOFS + 161)) && (vgay > `YOFS) && (vgay < (`YOFS + 144))) begin
72                         vgafb <= vgafb + 1;
73                         failandloss <= fb[vgafb + 1];
74                 end
75                 
76                 // Need thsi here; vgaclk >>> lcdclk
77                 if ((lcdy < 144) && (lcdx < 160))
78                         fb[lcdfb] <= {lcdr[2], lcdg[2], lcdb[1]};
79         end
80 endmodule
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