]> Joshua Wise's Git repositories - fpgaboy.git/blob - insn_ld_reg_imm16.v
Add a dirty hack to make the sim pipe directly to the readout script.
[fpgaboy.git] / insn_ld_reg_imm16.v
1 `ifdef EXECUTE
2         `INSN_LD_reg_imm16: begin
3                 `EXEC_INC_PC
4                 case (cycle)
5                 0:      `EXEC_READ(`_PC + 1)
6                 1:      `EXEC_READ(`_PC + 1)
7                 2:      `EXEC_NEWCYCLE
8                 endcase
9         end
10 `endif
11
12 `ifdef WRITEBACK
13         `INSN_LD_reg_imm16: begin
14                 case (cycle)
15                 0:      begin /* */ end
16                 1:      begin
17                                 case (opcode[5:4])
18                                 `INSN_reg16_BC: `_C <= rdata;
19                                 `INSN_reg16_DE: `_E <= rdata;
20                                 `INSN_reg16_HL: `_L <= rdata;
21                                 `INSN_reg16_SP: `_SPL <= rdata;
22                                 endcase
23                         end
24                 2:      begin
25                                 case (opcode[5:4])
26                                 `INSN_reg16_BC: `_B <= rdata;
27                                 `INSN_reg16_DE: `_D <= rdata;
28                                 `INSN_reg16_HL: `_H <= rdata;
29                                 `INSN_reg16_SP: `_SPH <= rdata;
30                                 endcase
31                         end
32                 endcase
33         end
34 `endif
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