Make the boot rom talk a bit more, and wait for you to flip a switch. Make the 'progr...
[fpgaboy.git] / Interrupt.v
1 `define ADDR_IF 16'hFF0F
2 `define ADDR_IE 16'hFFFF
3
4 module Interrupt(
5         input clk,
6         input rd,
7         input wr,
8         input [15:0] addr,
9         inout [7:0] data,
10         input vblank,
11         input lcdc,
12         input tovf,
13         input serial,
14         input buttons,
15         output master,
16         output [7:0] jaddr);
17
18         wire [7:0] iflag = {3'b0,buttons,serial,tovf,lcdc,vblank};
19         reg [7:0] imask = 16'hFFFF;
20         reg [7:0] ihold = 8'b0;
21         wire [7:0] imasked = ihold & imask;
22         
23         reg rdlatch = 0;
24         reg [15:0] addrlatch = 0;
25
26         assign data = rdlatch ?
27                          (addrlatch == `ADDR_IF) ? ihold :
28                          (addrlatch == `ADDR_IE) ? imask :
29                          8'bzzzzzzzz :
30                       8'bzzzzzzzz;
31
32         assign master = (imasked) != 0;
33
34         assign jaddr = imasked[0] ? 8'h40 :
35                        imasked[1] ? 8'h48 :
36                        imasked[2] ? 8'h50 :
37                        imasked[3] ? 8'h58 :
38                        imasked[4] ? 8'h60 : 8'h00;
39
40         always @(posedge clk)
41         begin
42                 if (wr && (addr == `ADDR_IF || addr == `ADDR_IE)) begin
43                         case(addr)
44                         `ADDR_IF : ihold <= iflag | data;
45                         `ADDR_IE : begin imask <= data; ihold <= ihold | iflag; end
46                         endcase
47                         
48                 end
49                 else
50                         ihold <= ihold | iflag;
51                 rdlatch <= rd;
52                 addrlatch <= addr;
53         end
54
55 endmodule
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