]> Joshua Wise's Git repositories - fpgaboy.git/blob - core/insn_incdec_hl.v
Fix ld (nn), sp, for real this time.
[fpgaboy.git] / core / insn_incdec_hl.v
1 `define INSN_INCDEC_HL          9'b00011010x
2
3 `ifdef EXECUTE
4         `INSN_INCDEC_HL: begin
5                 case (cycle)
6                 0:      `EXEC_READ(`_HL)
7                 1:      `EXEC_WRITE(`_HL, rdata + (opcode[0] ? 8'hFF : 8'h01))
8                 2:      begin
9                                 `EXEC_INC_PC
10                                 `EXEC_NEWCYCLE
11                         end
12                 endcase
13         end
14 `endif
15
16 `ifdef WRITEBACK
17         `INSN_INCDEC_HL: begin
18                 /* meh meh */
19         end
20 `endif
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