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[fpgaboy.git] / insn_bit.v
1 `ifdef EXECUTE
2         `INSN_BIT: begin
3                 if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 0)) begin
4                         `EXEC_READ(`_HL)
5                 end else if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 2)) begin
6                         `EXEC_NEWCYCLE
7                 end else begin
8                         `EXEC_INC_PC
9                         case (opcode[2:0])
10                         `INSN_reg_A:    tmp <= `_A;
11                         `INSN_reg_B:    tmp <= `_B;
12                         `INSN_reg_C:    tmp <= `_C;
13                         `INSN_reg_D:    tmp <= `_D;
14                         `INSN_reg_E:    tmp <= `_E;
15                         `INSN_reg_H:    tmp <= `_H;
16                         `INSN_reg_L:    tmp <= `_L;
17                         `INSN_reg_dHL:  tmp <= rdata;
18                         endcase
19                         if (opcode[2:0] != `INSN_reg_dHL) begin
20                                 `EXEC_NEWCYCLE
21                         end
22                 end
23         end
24 `endif
25
26 `ifdef WRITEBACK
27         `INSN_BIT: begin
28                 if ((opcode[2:0] != `INSN_reg_dHL) || (cycle == 1))
29                         `_F <= {~tmp[opcode[5:3]], 2'b01, `_F[4:0]};
30         end
31 `endif
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