[fpgaboy.git] / insn_ld_reg_reg.v

`ifdef EXECUTE
	`INSN_LD_reg_reg: begin
		`EXEC_INC_PC;
		`EXEC_NEWCYCLE;
		case (opcode[2:0])
		`INSN_reg_A:	tmp <= registers[`REG_A];
		`INSN_reg_B:	tmp <= registers[`REG_B];
		`INSN_reg_C:	tmp <= registers[`REG_C];
		`INSN_reg_D:	tmp <= registers[`REG_D];
		`INSN_reg_E:	tmp <= registers[`REG_E];
		`INSN_reg_H:	tmp <= registers[`REG_H];
		`INSN_reg_L:	tmp <= registers[`REG_L];
		endcase
	end
`endif

`ifdef WRITEBACK
	`INSN_LD_reg_reg: begin
		case (opcode[5:3])
		`INSN_reg_A:	registers[`REG_A] <= tmp;
		`INSN_reg_B:	registers[`REG_B] <= tmp;
		`INSN_reg_C:	registers[`REG_C] <= tmp;
		`INSN_reg_D:	registers[`REG_D] <= tmp;
		`INSN_reg_E:	registers[`REG_E] <= tmp;
		`INSN_reg_H:	registers[`REG_H] <= tmp;
		`INSN_reg_L:	registers[`REG_L] <= tmp;
		endcase
	end
`endif
Commit	Line	Data
81358c71 JW	1	`ifdef EXECUTE
	2	`INSN_LD_reg_reg: begin
	3	`EXEC_INC_PC;
	4	`EXEC_NEWCYCLE;
	5	case (opcode[2:0])
	6	`INSN_reg_A: tmp <= registers[`REG_A];
	7	`INSN_reg_B: tmp <= registers[`REG_B];
	8	`INSN_reg_C: tmp <= registers[`REG_C];
	9	`INSN_reg_D: tmp <= registers[`REG_D];
	10	`INSN_reg_E: tmp <= registers[`REG_E];
	11	`INSN_reg_H: tmp <= registers[`REG_H];
	12	`INSN_reg_L: tmp <= registers[`REG_L];
	13	endcase
	14	end
	15	`endif
	16
	17	`ifdef WRITEBACK
	18	`INSN_LD_reg_reg: begin
	19	case (opcode[5:3])
	20	`INSN_reg_A: registers[`REG_A] <= tmp;
	21	`INSN_reg_B: registers[`REG_B] <= tmp;
	22	`INSN_reg_C: registers[`REG_C] <= tmp;
	23	`INSN_reg_D: registers[`REG_D] <= tmp;
	24	`INSN_reg_E: registers[`REG_E] <= tmp;
	25	`INSN_reg_H: registers[`REG_H] <= tmp;
	26	`INSN_reg_L: registers[`REG_L] <= tmp;
	27	endcase
	28	end
	29	`endif