Update current opcodes
[fpgaboy.git] / opcodes
CommitLineData
f9000d73
JW
1YET UNIMPLEMENTED:
2
3imm3 = 3-bit immediate value in 8 bits
4imm8 = 8-bit immediate value
5imm16 = 16-bit immediate value
616m8 = 8-bit value at the 16-bit address
78m8 = 8-bit value at the 8-bit address (the 16-bit equivalent is 0xFF00 + addr)
8
9bits insn notes
f9000d73
JW
100000 1000 LD 16m16,SP loads SP
110000 1001 ADD HL, BC
f9000d73 120001 0000 STOP
f9000d73 130001 1001 ADD HL, DE
f9000d73
JW
140010 1001 ADD HL, HL
150011 1001 ADD HL, SP
160111 0110 HALT Danger! Helvetica!
171100 1011 - - - see two-byte opcodes below
181110 1000 ADD SP, imm8
191111 1000 LDHL SP, imm8 load SP+n (signed n) into HL
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21*****************************
22
23fucking two-byte opcodes
24
25bits insn notes
261100 1011 0000 0000 RLC B
271100 1011 0000 0001 RLC C
281100 1011 0000 0010 RLC D
291100 1011 0000 0011 RLC E
301100 1011 0000 0100 RLC H
311100 1011 0000 0101 RLC L
321100 1011 0000 0110 RLC (HL)
331100 1011 0000 0111 RLC A
34
351100 1011 0000 1000 RRC B
361100 1011 0000 1001 RRC C
371100 1011 0000 1010 RRC D
381100 1011 0000 1011 RRC E
391100 1011 0000 1100 RRC H
401100 1011 0000 1101 RRC L
411100 1011 0000 1110 RRC (HL)
421100 1011 0000 1111 RRC A
43
441100 1011 0001 0000 RL B
451100 1011 0001 0001 RL C
461100 1011 0001 0010 RL D
471100 1011 0001 0011 RL E
481100 1011 0001 0100 RL H
491100 1011 0001 0101 RL L
501100 1011 0001 0110 RL (HL)
511100 1011 0001 0111 RL A
52
531100 1011 0001 1000 RR B
541100 1011 0001 1001 RR C
551100 1011 0001 1010 RR D
561100 1011 0001 1011 RR E
571100 1011 0001 1100 RR H
581100 1011 0001 1101 RR L
591100 1011 0001 1110 RR (HL)
601100 1011 0001 1111 RR A
61
621100 1011 0010 0000 SLA B
631100 1011 0010 0001 SLA C
641100 1011 0010 0010 SLA D
651100 1011 0010 0011 SLA E
661100 1011 0010 0100 SLA H
671100 1011 0010 0101 SLA L
681100 1011 0010 0110 SLA (HL)
691100 1011 0010 0111 SLA A
70
711100 1011 0010 1000 SRA B
721100 1011 0010 1001 SRA C
731100 1011 0010 1010 SRA D
741100 1011 0010 1011 SRA E
751100 1011 0010 1100 SRA H
761100 1011 0010 1101 SRA L
771100 1011 0010 1110 SRA (HL)
781100 1011 0010 1111 SRA A
79
801100 1011 0011 1000 SRL B
811100 1011 0011 1001 SRL C
821100 1011 0011 1010 SRL D
831100 1011 0011 1011 SRL E
841100 1011 0011 1100 SRL H
851100 1011 0011 1101 SRL L
861100 1011 0011 1110 SRL (HL)
871100 1011 0011 1111 SRL A
88
891100 1011 0011 0000 SWAP B swaps upper and lower nibbles of a byte
901100 1011 0011 0001 SWAP C
911100 1011 0011 0010 SWAP D
921100 1011 0011 0011 SWAP E
931100 1011 0011 0100 SWAP H
941100 1011 0011 0101 SWAP L
951100 1011 0011 0110 SWAP (HL)
961100 1011 0011 0111 SWAP A
97
981100 1011 0100 0000 BIT imm3, B test bit specified by imm3
991100 1011 0100 0001 BIT imm3, C
1001100 1011 0100 0010 BIT imm3, D
1011100 1011 0100 0011 BIT imm3, E
1021100 1011 0100 0100 BIT imm3, H
1031100 1011 0100 0101 BIT imm3, L
1041100 1011 0100 0110 BIT imm3, (HL)
1051100 1011 0100 0111 BIT imm3, A
106
1071100 1011 1000 0000 RES imm3, B reset bit specified by imm3
1081100 1011 1000 0001 RES imm3, C
1091100 1011 1000 0010 RES imm3, D
1101100 1011 1000 0011 RES imm3, E
1111100 1011 1000 0100 RES imm3, H
1121100 1011 1000 0101 RES imm3, L
1131100 1011 1000 0110 RES imm3, (HL)
1141100 1011 1000 0111 RES imm3, A
115
1161100 1011 1100 0000 SET imm3, B set bit specified by imm3
1171100 1011 1100 0001 SET imm3, C
1181100 1011 1100 0010 SET imm3, D
1191100 1011 1100 0011 SET imm3, E
1201100 1011 1100 0100 SET imm3, H
1211100 1011 1100 0101 SET imm3, L
1221100 1011 1100 0110 SET imm3, (HL)
1231100 1011 1100 0111 SET imm3, A
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