]> Joshua Wise's Git repositories - fpgaboy.git/blame - core/insn_ld_reg_reg.v
Fix ld (nn), sp, for real this time.
[fpgaboy.git] / core / insn_ld_reg_reg.v
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1`define INSN_LD_reg_reg 9'b001xxxxxx
2
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3`ifdef EXECUTE
4 `INSN_LD_reg_reg: begin
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5 `EXEC_INC_PC
6 `EXEC_NEWCYCLE
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8 `INSN_reg_A: tmp <= `_A;
9 `INSN_reg_B: tmp <= `_B;
10 `INSN_reg_C: tmp <= `_C;
11 `INSN_reg_D: tmp <= `_D;
12 `INSN_reg_E: tmp <= `_E;
13 `INSN_reg_H: tmp <= `_H;
14 `INSN_reg_L: tmp <= `_L;
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15 endcase
16 end
17`endif
18
19`ifdef WRITEBACK
20 `INSN_LD_reg_reg: begin
21 case (opcode[5:3])
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22 `INSN_reg_A: `_A <= tmp;
23 `INSN_reg_B: `_B <= tmp;
24 `INSN_reg_C: `_C <= tmp;
25 `INSN_reg_D: `_D <= tmp;
26 `INSN_reg_E: `_E <= tmp;
27 `INSN_reg_H: `_H <= tmp;
28 `INSN_reg_L: `_L <= tmp;
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29 endcase
30 end
31`endif
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