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(parent: 81a01a2) | patch
Memory: Add delayed flush. Make outbubble correct by moving it to the end (sadface...
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Wed, 14 Jan 2009 07:22:48 +0000 (02:22 -0500)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Wed, 14 Jan 2009 07:22:48 +0000 (02:22 -0500)
commitd73619a2a0e4f5876da7f7f413fef61e40a7e063
treea67fb347add8eedb0769f08b038d21e7a7622493tree | snapshot
parent81a01a2b3225a62f9f0af74e5b2480c51ddbd1fecommit | diff
Memory: Add delayed flush.  Make outbubble correct by moving it to the end (sadface).  Correct behavior in ldmstm if it has to rw_wait.  Make ldmstm more verbose.
Memory.v diff | blob | blame | history
FireARM pipelined ARM-like CPU implementation in Verilog
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