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Fix up ALU order in Issue.
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Tue, 30 Dec 2008 08:29:33 +0000 (03:29 -0500)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Tue, 30 Dec 2008 08:29:33 +0000 (03:29 -0500)
commit0ede28efad9b536d699c10d257eb2b6a3804919f
treef83c758804553b40bcb4acbaa4d20556c0299445tree | snapshot
parent6b8a01fa803079631cf8841e8f06c7ad6a5c2695commit | diff
Fix up ALU order in Issue.
Issue.v diff | blob | blame | history
FireARM pipelined ARM-like CPU implementation in Verilog
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