added branch support, maybe

[firearm.git] / Issue.v

diff --git a/Issue.v b/Issue.v
index 3c8303a475c17e56134d0d206c55d9a8ea784ad7..ef53bc3ed932365292c5969a7a95b7f74d88f42f 100644 (file)
--- a/Issue.v
+++ b/Issue.v
@@ -290,15 +290,22 @@ module Issue(
        begin
                if (waiting)
                        $display("ISSUE: Stalling instruction %08x because %d/%d", insn, waiting_cpsr, waiting_regs);
        begin
                if (waiting)
                        $display("ISSUE: Stalling instruction %08x because %d/%d", insn, waiting_cpsr, waiting_regs);

-       
-               if (!stall)
+
+               if(flush)
+               begin
+                       cpsr_inflight[0] = 1'b0;
+                       cpsr_inflight[1] = 1'b0;
+                       regs_inflight[0] = 16'b0;
+                       regs_inflight[1] = 16'b0;
+               end
+               else if (!stall)

                begin
                        cpsr_inflight[0] <= cpsr_inflight[1];   /* I'm not sure how well selects work with arrays, and that seems like a dumb thing to get anusulated by. */
                        cpsr_inflight[1] <= (waiting || inbubble || !condition_met) ? 0 : def_cpsr;
                        regs_inflight[0] <= regs_inflight[1];
                        regs_inflight[1] <= (waiting || inbubble || !condition_met) ? 0 : def_regs;
                        
                begin
                        cpsr_inflight[0] <= cpsr_inflight[1];   /* I'm not sure how well selects work with arrays, and that seems like a dumb thing to get anusulated by. */
                        cpsr_inflight[1] <= (waiting || inbubble || !condition_met) ? 0 : def_cpsr;
                        regs_inflight[0] <= regs_inflight[1];
                        regs_inflight[1] <= (waiting || inbubble || !condition_met) ? 0 : def_regs;
                        

-                       outbubble <= inbubble | waiting | !condition_met;
+                       outbubble <= inbubble | waiting | !condition_met | flush;

                        outpc <= inpc;
                        outinsn <= insn;
                end
                        outpc <= inpc;
                        outinsn <= insn;
                end