- input clk,
- input Nrst,
- input [3:0] read_0,
- output wire [31:0] rdata_0,
- input [3:0] read_1,
- output wire [31:0] rdata_1,
- input [3:0] read_2,
- output wire [31:0] rdata_2,
- input [3:0] read_3,
- output wire [31:0] rdata_3,
+ input clk,
+ input Nrst,
+ input [3:0] rf__read_0_1a,
+ output wire [31:0] rf__rdata_0_1a,
+ input [3:0] rf__read_1_1a,
+ output wire [31:0] rf__rdata_1_1a,
+ input [3:0] rf__read_2_1a,
+ output wire [31:0] rf__rdata_2_1a,
+ input [3:0] rf__read_3_3a,
+ output wire [31:0] rf__rdata_3_3a,