input [31:0] inpc,
input [31:0] cpsr,
- output reg outstall = 0, /* stage outputs */
+ output wire outstall, /* stage outputs */
output reg outbubble = 1,
output reg [31:0] outpc = 0,
output reg [31:0] outinsn = 0
reg cpsr_inflight [1:0];
reg [15:0] regs_inflight [1:0];
- reg waiting_cpsr;
- reg waiting_regs;
- wire waiting = waiting_cpsr | waiting_regs;
-
initial
begin
cpsr_inflight[0] = 0;
regs_inflight[0] = 0;
regs_inflight[1] = 0;
end
-
- always @(*)
- begin
- waiting_cpsr = use_cpsr & (cpsr_inflight[0] | cpsr_inflight[1]);
- waiting_regs = |(use_regs & (regs_inflight[0] | regs_inflight[1]));
-
- outstall = (waiting && !inbubble && !flush) || stall; /* Happens in an always @*, because it is an exception. */
- end
+
+ wire waiting_cpsr = use_cpsr & (cpsr_inflight[0] | cpsr_inflight[1]);
+ wire waiting_regs = |(use_regs & (regs_inflight[0] | regs_inflight[1]));
+ wire waiting = waiting_cpsr | waiting_regs;
+ assign outstall = (waiting && !inbubble && !flush) || stall;
reg delayedflush = 0;
- always @(posedge clk)
- if (flush && outstall /* halp! I can't do it now, maybe later? */)
+ always @(posedge clk/* or negedge Nrst*/)
+ if (!Nrst)
+ delayedflush <= 0;
+ else if (flush && outstall /* halp! I can't do it now, maybe later? */)
delayedflush <= 1;
else if (!outstall /* anything has been handled this time around */)
delayedflush <= 0;
/* Actually do the issue. */
- always @(posedge clk)
+ always @(posedge clk or negedge Nrst)
begin
if (waiting)
$display("ISSUE: Stalling instruction %08x because %d/%d", insn, waiting_cpsr, waiting_regs);
- if (!stall)
+ if (!Nrst) begin
+ cpsr_inflight[0] <= 0;
+ cpsr_inflight[1] <= 0;
+ regs_inflight[0] <= 0;
+ regs_inflight[1] <= 0;
+ outbubble <= 1;
+ end else if (!stall)
begin
cpsr_inflight[0] <= cpsr_inflight[1]; /* I'm not sure how well selects work with arrays, and that seems like a dumb thing to get anusulated by. */
cpsr_inflight[1] <= (waiting || inbubble || !condition_met) ? 0 : def_cpsr;