+
+ $display("LDMSTM: Stage 2: Writing: regs %b, next_regs %b, reg %d, wr_data %08x, addr %08x", regs, next_regs, cur_reg, st_data, busaddr);
+ end
+ `LSM_BASEWB: begin
+ outstall = 1;
+ next_lsm_state = `LSM_WBFLUSH;
+ $display("LDMSTM: Stage 3: Writing back");
+ end
+ `LSM_WBFLUSH: begin
+ outstall = 0;
+ next_lsm_state = `LSM_SETUP;
+ end
+ default: begin
+ outstall = 1'bx;
+ next_lsm_state = 4'bxxxx;
+ end
+ endcase
+ $display("LDMSTM: Decoded, bubble %d, insn %08x, lsm state %b -> %b, stall %d", inbubble, insn, lsm_state, next_lsm_state, outstall);
+ end
+ `DECODE_LDCSTC: if(!inbubble) begin
+ $display("WARNING: Unimplemented LDCSTC");
+ end
+ `DECODE_CDP: if (!inbubble) begin
+ if (cp_busy) begin
+ outstall = 1;
+ end
+ if (!cp_ack) begin
+ /* XXX undefined instruction trap */
+ $display("WARNING: Possible CDP undefined instruction");
+ end
+ end
+ `DECODE_MRCMCR: if (!inbubble) begin
+ if (cp_busy) begin
+ outstall = 1;
+ end
+ if (!cp_ack) begin
+ $display("WARNING: Possible MRCMCR undefined instruction: cp_ack %d, cp_busy %d",cp_ack, cp_busy);
+ end
+ $display("MRCMCR: ack %d, busy %d", cp_ack, cp_busy);
+ end
+ default: begin end
+ endcase
+ end
+
+ /* Coprocessor input. */
+ always @(*)
+ begin
+ cp_req = 0;
+ cp_rnw = 1'bx;
+ cp_write = 32'hxxxxxxxx;
+ casez (insn)
+ `DECODE_CDP: if(!inbubble) begin
+ cp_req = 1;
+ end
+ `DECODE_MRCMCR: if(!inbubble) begin
+ cp_req = 1;
+ cp_rnw = insn[20] /* L */;
+ if (insn[20] == 0 /* store to coprocessor */)
+ cp_write = op0;
+ end
+ endcase
+ end
+
+ /* Register output logic. */
+ always @(*)
+ begin
+ next_write_reg = write_reg;
+ next_write_num = write_num;
+ next_write_data = write_data;
+ next_outcpsr = lsm_state == 4'b0010 ? outcpsr : cpsr;
+ next_outcpsrup = cpsrup;
+
+ casez(insn)
+ `DECODE_ALU_SWP: if (!inbubble) begin
+ next_write_reg = 1'bx;
+ next_write_num = 4'bxxxx;
+ next_write_data = 32'hxxxxxxxx;
+ case(swp_state)
+ `SWP_READING:
+ next_write_reg = 1'b0;
+ `SWP_WRITING: begin
+ next_write_reg = 1'b1;
+ next_write_num = insn[15:12];
+ next_write_data = insn[22] ? {24'b0, swp_oldval[7:0]} : swp_oldval;
+ end
+ default: begin end
+ endcase
+ end
+ `DECODE_ALU_MULT: begin
+ next_write_reg = write_reg; /* XXX workaround for ISE 10.1 bug */
+ next_write_num = write_num;
+ next_write_data = write_data;
+ next_outcpsr = lsm_state == 4'b0010 ? outcpsr : cpsr;
+ next_outcpsrup = cpsrup;
+ end
+ `DECODE_ALU_HDATA_REG,
+ `DECODE_ALU_HDATA_IMM: if(!inbubble) begin
+ next_write_reg = 1'bx;
+ next_write_num = 4'bxxxx;
+ next_write_data = 32'hxxxxxxxx;
+ case(lsrh_state)
+ `LSRH_MEMIO: begin
+ next_write_num = insn[15:12];
+ next_write_data = lsrh_rddata;
+ if(insn[20]) begin