+ RegFile regfile(
+ .clk(clk),
+ .read_0(regfile_read_0), .read_1(regfile_read_1), .read_2(regfile_read_2),
+ .rdata_0(regfile_rdata_0), .rdata_1(regfile_rdata_1), .rdata_2(regfile_rdata_2),
+ .write(0), .write_req(0), .write_data(0 /* XXX */));
+
+ Decode decode(
+ .clk(clk),
+ .insn(insn_out_fetch), .inpc(pc_out_fetch), .incpsr(0 /* XXX */),
+ .op0(decode_out_op0), .op1(decode_out_op1), .op2(decode_out_op2),
+ .carry(decode_out_carry),
+ .read_0(regfile_read_0), .read_1(regfile_read_1), .read_2(regfile_read_2),
+ .rdata_0(regfile_rdata_0), .rdata_1(regfile_rdata_1), .rdata_2(regfile_rdata_2));
+
+ Execute execute(
+ .clk(clk), .Nrst(0),
+ .stall(0 /* XXX */), .flush(0 /* XXX */),
+ .inbubble(bubble_out_issue), .pc(pc_out_issue), .insn(insn_out_issue),
+ .cpsr(0 /* XXX */), .op0(decode_out_op0), .op1(decode_out_op1),
+ .op2(decode_out_op2), .carry(decode_out_carry),
+ .outstall(stall_cause_execute), .outbubble(execute_out_bubble),
+ .write_reg(execute_out_write_reg), .write_num(execute_out_write_num),
+ .write_data(execute_out_write_data));
+
+ reg [31:0] clockno = 0;