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Add tests directory.
[firearm.git] / tests / ram.hex
diff --git a/tests/ram.hex b/tests/ram.hex
new file mode 120000 (symlink)
index 0000000..0f379b7
--- /dev/null
+++ b/tests/ram.hex
@@ -0,0 +1 @@
+costas.hex
\ No newline at end of file
FireARM pipelined ARM-like CPU implementation in Verilog
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