Fetch: Allow new queued jumps to take precedence over old queued jumps (i.e., ldm...

[firearm.git] / Decode.v

diff --git a/Decode.v b/Decode.v
index 495942bee6d7282fb7ed9afa57348f067ef9d641..2c227460eba0b046d3a0689f9b75da6835c6558a 100644 (file)
--- a/Decode.v
+++ b/Decode.v
@@ -2,6 +2,7 @@
 
 module Decode(
        input clk,
+       input stall,
        input [31:0] insn,
        input [31:0] inpc,
        input [31:0] incpsr,
@@ -10,6 +11,7 @@ module Decode(
        output reg [31:0] op1,
        output reg [31:0] op2,
        output reg carry,
+       output reg [31:0] outcpsr,
        output reg [31:0] outspsr,
 
        output reg [3:0] read_0,
@@ -179,7 +181,7 @@ module Decode(
                        read_2 = insn[15:12];
                        
                        op0_out = regs0;
-                       if(insn[25]) begin
+                       if(!insn[25] /* immediate */) begin
                                op1_out = {20'b0, insn[11:0]};
                                carry_out = incpsr[`CPSR_C];
                        end else begin
@@ -225,11 +227,15 @@ module Decode(
 
        
        always @ (posedge clk) begin
-               op0 <= op0_out;   /* Rn - always */
-               op1 <= op1_out; /* 'operand 2' - Rm */
-               op2 <= op2_out;   /* thirdedge - Rs */
-               carry <= carry_out;
-               outspsr <= inspsr;
+               if (!stall)
+               begin
+                       op0 <= op0_out;   /* Rn - always */
+                       op1 <= op1_out; /* 'operand 2' - Rm */
+                       op2 <= op2_out;   /* thirdedge - Rs */
+                       carry <= carry_out;
+                       outcpsr <= incpsr;
+                       outspsr <= inspsr;
+               end
        end
 
 endmodule