+ `DECODE_LDMSTM: /* Block data transfer */
+ begin end
+ `DECODE_BRANCH: /* Branch */
+ begin
+ if(insn_2a[24] /* L */) begin
+ next_write_reg_3a = 1;
+ next_write_num_3a = 4'hE; /* link register */
+ next_write_data_3a = pc_2a + 32'h4;
+ end
+ end
+ endcase
+ end
+
+ /* Multiplier inputs */
+ always @(*)
+ begin
+ mult_start = 0;
+ mult_acc0 = 32'hxxxxxxxx;
+ mult_in0 = 32'hxxxxxxxx;
+ mult_in1 = 32'hxxxxxxxx;
+
+ casez(insn_2a)
+ `DECODE_ALU_MULT:
+ begin
+ if (!outstall_3a /* i.e., this is a new one */ && !bubble_2a /* i.e., this is a real one */)
+ begin
+ mult_start = 1;
+ mult_acc0 = insn_2a[21] /* A */ ? op0_2a /* Rn */ : 32'h0;
+ mult_in0 = op1_2a /* Rm */;
+ mult_in1 = op2_2a /* Rs */;
+ $display("New MUL instruction");
+ end
+ end
+ endcase
+ end
+
+ /* Miscellaneous cleanup. */
+ always @(*)
+ begin
+ next_bubble_3a = bubble_2a | flush_2a | delayedflush_2a;
+
+ jmp_2a = 1'b0;
+ jmppc_2a = 32'h00000000;
+
+ casez (insn_2a)
+ `DECODE_ALU_MULT: /* Multiply -- must come before ALU, because it pattern matches a specific case of ALU */
+ next_bubble_3a = next_bubble_3a | !mult_done | !outstall_3a;
+ `DECODE_ALU_MRS, /* MRS (Transfer PSR to register) */
+ `DECODE_ALU_MSR, /* MSR (Transfer register to PSR) */
+ `DECODE_ALU_MSR_FLAGS, /* MSR (Transfer register or immediate to PSR, flag bits only) */
+ `DECODE_ALU_SWP, /* Atomic swap */
+ `DECODE_ALU_BX, /* Branch */
+ `DECODE_ALU_HDATA_REG, /* Halfword transfer - register offset */
+ `DECODE_ALU_HDATA_IMM, /* Halfword transfer - immediate offset */
+ `DECODE_ALU, /* ALU */
+ `DECODE_LDRSTR_UNDEFINED, /* Undefined. I hate ARM */
+ `DECODE_LDRSTR, /* Single data transfer */
+ `DECODE_LDMSTM: /* Block data transfer */
+ begin end
+ `DECODE_BRANCH:
+ begin
+ if(!bubble_2a && !flush_2a && !delayedflush_2a && !outstall_2a /* Let someone else take precedence. */) begin
+ jmppc_2a = pc_2a + op0_2a + 32'h8;
+ jmp_2a = 1'b1;
+ end
+ end /* Branch */