DCache: Rename more internal wires.

[firearm.git] / Makefile

diff --git a/Makefile b/Makefile
index daa9291635be5d55ee231d94b80b3c3bfc82540a..2c4bf600c9bd232e25a9ef63aba4c62712652bd7 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -4,9 +4,16 @@ all: Vsystem
 
 Vsystem: obj_dir/Vsystem.mk testbench.cpp
        make -C obj_dir -f Vsystem.mk
+       ln -sf obj_dir/Vsystem Vsystem
 
 obj_dir/Vsystem.mk: $(VLOGS)
        mkdir -p obj_dir
        verilator --cc system.v testbench.cpp --exe
 
-.DUMMY:
\ No newline at end of file
+auto: .DUMMY
+       emacs -l ~/elisp/verilog-mode.el --batch system.v -f verilog-batch-auto
+
+tests: .DUMMY
+       make -C tests
+
+.DUMMY: