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Add testbench
[firearm.git] / ram.hex
diff --git a/ram.hex b/ram.hex
new file mode 100644 (file)
index 0000000..937ce99
--- /dev/null
+++ b/ram.hex
@@ -0,0 +1,44 @@
+e180f081
+e180f081
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+
FireARM pipelined ARM-like CPU implementation in Verilog
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