]> Joshua Wise's Git repositories - firearm.git/blobdiff - Issue.v
added branch support, maybe
[firearm.git] / Issue.v
diff --git a/Issue.v b/Issue.v
index c3e579155bf09c9019a42d4df130291c9c2cf01e..ef53bc3ed932365292c5969a7a95b7f74d88f42f 100644 (file)
--- a/Issue.v
+++ b/Issue.v
@@ -167,7 +167,7 @@ module Issue(
                                                (idxbit(rs) | idxbit(rm)) :
                                                (idxbit(rm)))) |
                                (((alu_opc != `ALU_MOV) && (alu_opc != `ALU_MVN)) ? idxbit(rn) : 0);
-                       def_cpsr = insn[20] /* S */ | alu_is_logical(alu_opc);
+                       def_cpsr = insn[20] /* S */;
                        def_regs = alu_flags_only(alu_opc) ? 0 : idxbit(rd);
                end
                `DECODE_LDRSTR_UNDEFINED:       /* Undefined. I hate ARM */
@@ -290,15 +290,22 @@ module Issue(
        begin
                if (waiting)
                        $display("ISSUE: Stalling instruction %08x because %d/%d", insn, waiting_cpsr, waiting_regs);
-       
-               if (!stall)
+
+               if(flush)
+               begin
+                       cpsr_inflight[0] = 1'b0;
+                       cpsr_inflight[1] = 1'b0;
+                       regs_inflight[0] = 16'b0;
+                       regs_inflight[1] = 16'b0;
+               end
+               else if (!stall)
                begin
                        cpsr_inflight[0] <= cpsr_inflight[1];   /* I'm not sure how well selects work with arrays, and that seems like a dumb thing to get anusulated by. */
                        cpsr_inflight[1] <= (waiting || inbubble || !condition_met) ? 0 : def_cpsr;
                        regs_inflight[0] <= regs_inflight[1];
                        regs_inflight[1] <= (waiting || inbubble || !condition_met) ? 0 : def_regs;
                        
-                       outbubble <= inbubble | waiting | !condition_met;
+                       outbubble <= inbubble | waiting | !condition_met | flush;
                        outpc <= inpc;
                        outinsn <= insn;
                end
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