DCache, ICache: Move curdata out to its own wire for synthesis. Fix up a blocking...

[firearm.git] / ICache.v

diff --git a/ICache.v b/ICache.v
index d9fbf04b6f07858a01d965647a989a5231cd3ae3..e6754b722acb93829811c7758d64914ecbc538b2 100644 (file)
--- a/ICache.v
+++ b/ICache.v
@@ -48,10 +48,11 @@ module ICache(
        reg [31:0] prev_rd_addr = 32'hFFFFFFFF;
        
        wire cache_hit = cache_valid[rd_idx] && (cache_tags[rd_idx] == rd_tag);
-       
-       always @(*) begin       /* XXX does this work nowadays? */
+
+       wire [31:0] curdata = cache_data[rd_idx][rd_didx_word];
+       always @(*) begin
                rd_wait = rd_req && !cache_hit;
-               rd_data = cache_data[rd_idx][rd_didx_word];
+               rd_data = curdata;
        end
        
        reg [3:0] cache_fill_pos = 0;