Add chip enable correctness for CellularRAM.

[firearm.git] / ICache.v

diff --git a/ICache.v b/ICache.v
index 081fc10d3a4732673daff76c707a0ce046ef79dc..dc26fdc4b52f469785d24e844702d3a60453bbeb 100644 (file)
--- a/ICache.v
+++ b/ICache.v
@@ -39,7 +39,7 @@ module ICache(
        
        reg cache_valid [15:0];
        reg [21:0] cache_tags [15:0];
-       reg [31:0] cache_data [255:0 /* {line, word} */];       //synthesis attribute ram_style of cache_data is distributed
+       reg [31:0] cache_data [255:0 /* {line, word} */];       //synthesis attribute ram_style of cache_data is block
        
        integer i;
        initial