Add support for CellularRAM on Nexys2.

[firearm.git] / tests / testbench.c

diff --git a/tests/testbench.c b/tests/testbench.c
index 0c1cb7710ee7455cba0add789d267150ce470b93..f078ecd49b226ba92ae9316c43c6a57f1210fa2b 100644 (file)
--- a/tests/testbench.c
+++ b/tests/testbench.c
@@ -1,5 +1,14 @@
 extern void putc(unsigned char c);
 
+int serial_getc (void)
+{
+       int c;
+       do
+               asm volatile("mrc 5, 0, %0, c1, c1, 1" : "=r"(c));
+       while (!(c & 0x100));
+       return c & 0xFF;
+}
+
 void puts(unsigned char *s)
 {
        while (*s)
@@ -93,10 +102,30 @@ void ldm_tester()
                puts("PASS\n");
 }
 
+void cellularram()
+{
+       volatile int *p = 0x80010000;
+       
+       puts("[writing] ");
+       p[0] = 0x12345678;
+       p[1] = 0x87654321;
+       p[2] = 0xAAAA5555;
+       p[3] = 0x5555AAAA;
+       puts("[cache flush] ");
+       p[0x1000] = 0x00000000;
+       puts("[reading: ");
+       puthex(p[0]);
+       puthex(p[1]);
+       puthex(p[2]);
+       puthex(p[3]);
+       puts("]\n");
+}
+
 struct tests tlist[] = {
        {"ldm pc/mul", ldm_tester},
        {"fact", facttest},
        {"j4cbo", j4cbo},
+       {"cellularram", cellularram},
        {"ack", acktest},
        {"miniblarg", testmain},
        {"corecurse", corecurse},
@@ -115,7 +144,9 @@ int main()
                puts(": ");
                t->test();
        }
-       puts("Done!\n");
+       puts("Done! Echoing characters.\n");
        
+       while (1)
+               putc(serial_getc());
        return 0;
 }